[PATCH] D118084: [CUDA, NVPTX] Pass byval aggregates directly
Johannes Doerfert via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Tue Jan 25 16:25:39 PST 2022
jdoerfert added a subscriber: lebedev.ri.
jdoerfert added a comment.
@lebedev.ri wanted to teach SROA how to deal with dynamic indices before, IIRC. It seems to be generally useful. This patch can wait till then?
================
Comment at: clang/lib/CodeGen/TargetInfo.cpp:7193
EIT->getNumBits() > 64))
return getNaturalAlignIndirect(Ty, /* byval */ true);
}
----------------
tra wrote:
> jdoerfert wrote:
> > When is this ever hit and should we not disable byval here too while we are at it?
> Basically it's saying "pass as byval pointer if it's an int that's larger than what we can lower".
> Yes, I think passing such integer directly would make sense.
>
> We may hit this if clang wants to pass `__i128` (do larger int types exist in clang?).
> I think (some of) this may be a leftover from the days when we didn't support i128 in CUDA/NVPTX. I think we do now.
We have larger types, I somewhat doubt using them will work properly everywhere though.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D118084/new/
https://reviews.llvm.org/D118084
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