[PATCH] D118015: [RISCV][NFC] Rename RequiredExtensions to RequiredFeatures.
Jianjian Guan via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Jan 24 18:26:35 PST 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG9ea3dfa5d015: [RISCV][NFC] Rename RequiredExtensions to RequiredFeatures. (authored by jacquesguan).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D118015/new/
https://reviews.llvm.org/D118015
Files:
clang/include/clang/Basic/riscv_vector.td
clang/utils/TableGen/RISCVVEmitter.cpp
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===================================================================
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -179,7 +179,7 @@
bool HasNoMaskedOverloaded, bool HasAutoDef,
StringRef ManualCodegen, const RVVTypes &Types,
const std::vector<int64_t> &IntrinsicTypes,
- const std::vector<StringRef> &RequiredExtensions, unsigned NF);
+ const std::vector<StringRef> &RequiredFeatures, unsigned NF);
~RVVIntrinsic() = default;
StringRef getBuiltinName() const { return BuiltinName; }
@@ -772,7 +772,7 @@
bool HasNoMaskedOverloaded, bool HasAutoDef,
StringRef ManualCodegen, const RVVTypes &OutInTypes,
const std::vector<int64_t> &NewIntrinsicTypes,
- const std::vector<StringRef> &RequiredExtensions,
+ const std::vector<StringRef> &RequiredFeatures,
unsigned NF)
: IRName(IRName), IsMask(IsMask), HasVL(HasVL), HasPolicy(HasPolicy),
HasNoMaskedOverloaded(HasNoMaskedOverloaded), HasAutoDef(HasAutoDef),
@@ -805,8 +805,8 @@
if (T->isVector(64))
RISCVPredefinedMacros |= RISCVPredefinedMacro::VectorMaxELen64;
}
- for (auto Extension : RequiredExtensions) {
- if (Extension == "RV64")
+ for (auto Feature : RequiredFeatures) {
+ if (Feature == "RV64")
RISCVPredefinedMacros |= RISCVPredefinedMacro::RV64;
}
@@ -1154,8 +1154,8 @@
StringRef ManualCodegenMask = R->getValueAsString("ManualCodegenMask");
std::vector<int64_t> IntrinsicTypes =
R->getValueAsListOfInts("IntrinsicTypes");
- std::vector<StringRef> RequiredExtensions =
- R->getValueAsListOfStrings("RequiredExtensions");
+ std::vector<StringRef> RequiredFeatures =
+ R->getValueAsListOfStrings("RequiredFeatures");
StringRef IRName = R->getValueAsString("IRName");
StringRef IRNameMask = R->getValueAsString("IRNameMask");
unsigned NF = R->getValueAsInt("NF");
@@ -1223,7 +1223,7 @@
Name, SuffixStr, MangledName, MangledSuffixStr, IRName,
/*IsMask=*/false, /*HasMaskedOffOperand=*/false, HasVL, HasPolicy,
HasNoMaskedOverloaded, HasAutoDef, ManualCodegen, Types.getValue(),
- IntrinsicTypes, RequiredExtensions, NF));
+ IntrinsicTypes, RequiredFeatures, NF));
if (HasMask) {
// Create a mask intrinsic
Optional<RVVTypes> MaskTypes =
@@ -1232,7 +1232,7 @@
Name, SuffixStr, MangledName, MangledSuffixStr, IRNameMask,
/*IsMask=*/true, HasMaskedOffOperand, HasVL, HasPolicy,
HasNoMaskedOverloaded, HasAutoDef, ManualCodegenMask,
- MaskTypes.getValue(), IntrinsicTypes, RequiredExtensions, NF));
+ MaskTypes.getValue(), IntrinsicTypes, RequiredFeatures, NF));
}
} // end for Log2LMULList
} // end for TypeRange
Index: clang/include/clang/Basic/riscv_vector.td
===================================================================
--- clang/include/clang/Basic/riscv_vector.td
+++ clang/include/clang/Basic/riscv_vector.td
@@ -215,8 +215,8 @@
// an automatic definition in header is emitted.
string HeaderCode = "";
- // Sub extension of vector spec.
- list<string> RequiredExtensions = [];
+ // Features required to enable for this builtin.
+ list<string> RequiredFeatures = [];
// Number of fields for Load/Store Segment instructions.
int NF = 1;
@@ -720,7 +720,7 @@
defvar eew64 = "64";
defvar eew64_type = "(Log2EEW:6)";
let Name = op # eew64 # "_v", IRName = op, IRNameMask = op # "_mask",
- RequiredExtensions = ["RV64"] in {
+ RequiredFeatures = ["RV64"] in {
def: RVVBuiltin<"v", "vPCe" # eew64_type # "Uv", type>;
if !not(IsFloat<type>.val) then {
def: RVVBuiltin<"Uv", "UvPCUe" # eew64_type # "Uv", type>;
@@ -819,7 +819,7 @@
defvar eew64 = "64";
defvar eew64_type = "(Log2EEW:6)";
let Name = op # eew64 # "_v", IRName = op, IRNameMask = op # "_mask",
- RequiredExtensions = ["RV64"] in {
+ RequiredFeatures = ["RV64"] in {
def : RVVBuiltin<"v", "0Pe" # eew64_type # "Uvv", type>;
if !not(IsFloat<type>.val) then {
def : RVVBuiltin<"Uv", "0PUe" # eew64_type # "UvUv", type>;
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