[PATCH] D117929: [XRay] Add support for RISCV

Ashwin Poduval via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Sat Jan 22 06:53:23 PST 2022

ashwin98 added a comment.

Thank you for your feedback! I could combine the riscv32 and 64 cpp files with some xlen conditions if that will work better, but that might take a bit of a hit in terms of readability (do I explain both sleds in the comments preceding the implementation). I have commented riscv32 out because I haven't managed to test it out yet, I've had some difficulty getting llvm set up for riscv 32 - I will leave riscv32 commented out only in the cmake file.

I wasn't too sure about how to work around sign extension in RISCV, which you have picked up on - I agree that adding 0x800 would help deal with sign extension, but wouldn't that only be required if the LSBs were sign extended? The way I understand it, if we were to always add 0x800, we'd end up adding 4096 even when our address is a small positive number like 40.

I had a similar question with respect to the 64 bit sleds - given that lui is also sign extended, we need a work around for it as well while constructing the 32 bit values, and while combining the 2 32 bit values into a 64 bit value. I have currently been getting rid of the upper 32 bits by performing a left shift followed by a right shift, but I'm sure there is a better solution to it.

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