[PATCH] D117913: [Clang][RISCV] Guard vmulh, vsmul correctly
Craig Topper via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Fri Jan 21 23:06:22 PST 2022
craig.topper added inline comments.
================
Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:1321
ListSeparator LS(" && ");
+ // Full multiplies for EEW=64 require V.
+ if (PredefinedMacros & RISCVPredefinedMacro::V)
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It's not as useful here. Should put it on line 812 where the condition is checked and explain that a FullMultiply is MULH and SMUL.
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rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D117913/new/
https://reviews.llvm.org/D117913
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