[PATCH] D112613: [RISCV] Change TARGET_BUILTIN require to zve32x for vector instruction

[Fraser Cormack via Phabricator via cfe-commits]

frasercrmck added a comment.

LGTM but I don't have full scope on the builtins side of things. I'd also add a missing word to the title: "Change TARGET_BUILTIN //to// require ..."


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D112613/new/

https://reviews.llvm.org/D112613