[PATCH] D117681: [RISCV] Add the policy operand for some masked RVV ternary IR intrinsics.
Zakk Chen via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Wed Jan 19 07:47:57 PST 2022
khchen created this revision.
khchen added reviewers: craig.topper, rogfer01, frasercrmck, kito-cheng, arcbbb, monkchiang.
Herald added subscribers: VincentWu, luke957, achieveartificialintelligence, vkmr, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, jrtc27, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya.
khchen requested review of this revision.
Herald added subscribers: llvm-commits, cfe-commits, eopXD, MaskRay.
Herald added projects: clang, LLVM.
Masked reduction intrinsics are specical cases which don't need to have policy
operand. The mask only affects which elements are read. It doesn't effect the
destination register.
The reduction intrinsics have a dedicated destination operand. If it
is undef, we use tail agnostic. If it not undef we use tail
undisturbed.
Co-Authored-by: Craig Topper <craig.topper at sifive.com>
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D117681
Files:
clang/include/clang/Basic/riscv_vector.td
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfmacc.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfmadd.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfmsac.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfmsub.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfnmacc.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfnmadd.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfnmsac.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfnmsub.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfwmacc.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfwmsac.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfwnmacc.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfwnmsac.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmacc.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmadd.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vnmsac.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vnmsub.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vslidedown.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vslideup.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vwmacc.c
clang/test/CodeGen/RISCV/rvv-intrinsics/vfmacc.c
clang/test/CodeGen/RISCV/rvv-intrinsics/vfmadd.c
clang/test/CodeGen/RISCV/rvv-intrinsics/vfmsac.c
clang/test/CodeGen/RISCV/rvv-intrinsics/vfmsub.c
clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmacc.c
clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmadd.c
clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmsac.c
clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmsub.c
clang/test/CodeGen/RISCV/rvv-intrinsics/vfwmacc.c
clang/test/CodeGen/RISCV/rvv-intrinsics/vfwmsac.c
clang/test/CodeGen/RISCV/rvv-intrinsics/vfwnmacc.c
clang/test/CodeGen/RISCV/rvv-intrinsics/vfwnmsac.c
clang/test/CodeGen/RISCV/rvv-intrinsics/vmacc.c
clang/test/CodeGen/RISCV/rvv-intrinsics/vmadd.c
clang/test/CodeGen/RISCV/rvv-intrinsics/vnmsac.c
clang/test/CodeGen/RISCV/rvv-intrinsics/vnmsub.c
clang/test/CodeGen/RISCV/rvv-intrinsics/vslidedown.c
clang/test/CodeGen/RISCV/rvv-intrinsics/vslideup.c
clang/test/CodeGen/RISCV/rvv-intrinsics/vwmacc.c
llvm/include/llvm/IR/IntrinsicsRISCV.td
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfmacc-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfmsub-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vmacc-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vmacc-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vmadd-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vmadd-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vnmsac-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vnmsac-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vnmsub-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vnmsub-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vwmacc-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vwmacc-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv64.ll
More information about the cfe-commits
mailing list