[PATCH] D117262: [NFC] Store Address's alignment into PointerIntPairs
Nikita Popov via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Tue Jan 18 13:46:30 PST 2022
nikic added inline comments.
================
Comment at: clang/lib/CodeGen/Address.h:30
+ // Int portion stores lower 3 bits of the log of the alignment.
+ llvm::PointerIntPair<llvm::Type *, 3, unsigned> ElementType;
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Are we guaranteed 3 bits even on 32-bit architectures?
================
Comment at: clang/lib/CodeGen/Address.h:45
+ auto AlignLog = llvm::Log2_64(alignment.getQuantity());
+ assert(AlignLog < (1 << 6) && "cannot fit alignment into 6 bits");
+ Pointer.setInt(AlignLog >> 3);
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Why can we assume this?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D117262/new/
https://reviews.llvm.org/D117262
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