[PATCH] D106518: [RISCV] Disable EEW=64 for index values when XLEN=32.
Jianjian Guan via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Sun Jan 9 18:52:33 PST 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG6b8362eb8dc8: [RISCV] Disable EEW=64 for index values when XLEN=32. (authored by jacquesguan).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D106518/new/
https://reviews.llvm.org/D106518
Files:
clang/include/clang/Basic/riscv_vector.td
clang/utils/TableGen/RISCVVEmitter.cpp
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVInstrInfoV.td
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll
llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll
llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll
llvm/test/CodeGen/RISCV/rvv/vsoxei-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vsuxei-rv32.ll
llvm/test/MC/RISCV/rvv/invalid-eew.s
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