[PATCH] D114318: [clang] Add missing CPUID feature bit masks

[Phoebe Wang via Phabricator via cfe-commits]

pengfei added a comment.

In D114318#3144721 <https://reviews.llvm.org/D114318#3144721>, @adamdb5 wrote:

> ran clang-format

I think we'd better to keep the existing format. It's in good readability.



================
Comment at: clang/lib/Headers/cpuid.h:110
+#define bit_RDRND 0x40000000
+#define bit_HYPERVISOR 0x80000000
 
----------------
Where's this from. The latest SDM doesn't define this bit. I didn't find it in your link either.


================
Comment at: clang/lib/Headers/cpuid.h:143
+#define bit_TM 0x20000000
+#define bit_IA64 0x40000000
+#define bit_PBE 0x80000000
----------------
This is reserved in latest SDM.


================
Comment at: clang/lib/Headers/cpuid.h:148
+#define bit_FSGSBASE 0x00000001
+#define bit_TSCADJUST 0x00000002
+#define bit_SGX 0x00000004
----------------
Is there any other source using the same name? The same below.


================
Comment at: clang/lib/Headers/cpuid.h:153
+#define bit_AVX2 0x00000020
+#define bit_FPUEXCEPT 0x00000040
+#define bit_SMEP 0x00000080
----------------
SDM calls it "FDP_EXCPTN_ONLY". Don't know where's "EXCPTN" from.


================
Comment at: clang/lib/Headers/cpuid.h:194
+#define bit_AVX512VPOPCNTDQ 0x00004000
+#define bit_LA57 0x00010000
+#define bit_RDPID 0x00400000
----------------
This is reserved in latest SDM.


================
Comment at: clang/lib/Headers/cpuid.h:209
+#define bit_UINTR 0x00000020
+#define bit_AVX512VPCINT 0x00000100
+#define bit_MD_CLEAR 0x00000400
----------------
Why not "AVX512VP2INT"?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D114318/new/

https://reviews.llvm.org/D114318