[PATCH] D110869: [X86] Implement -fzero-call-used-regs option

Phoebe Wang via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Tue Oct 26 20:05:12 PDT 2021


pengfei added inline comments.


================
Comment at: llvm/lib/Target/X86/X86FrameLowering.cpp:540
+  if (STI.hasSSE1())
+    AddRegs(CallUsedRegs, X86::VR128RegClass);
+  if (STI.hasAVX())
----------------
Do we need to consider VR128XRegClass and VR256XRegClass when `hasVLX()`?


================
Comment at: llvm/lib/Target/X86/X86FrameLowering.cpp:549
+
+  // TODO: MMX registers?
+
----------------
And AMX registers?
GCC also cleans mask(k0~k7) registers. But doesn't clean caller saved gpr registers: https://godbolt.org/z/6xcPh19hv
How about 32 bits? GCC doesn't clean the SSE registers on 32 bits.


================
Comment at: llvm/lib/Target/X86/X86FrameLowering.cpp:600
+      if (X86::GR32RegClass.contains(Reg))
+        if (auto SReg = TRI->getMatchingSuperReg(Reg, X86::sub_32bit,
+                                                 &X86::GR64RegClass))
----------------
Why just GPRs?


================
Comment at: llvm/lib/Target/X86/X86RegisterInfo.cpp:621
 
+BitVector X86RegisterInfo::getArgumentRegs(const MachineFunction &MF) const {
+  const X86Subtarget &Subtarget = MF.getSubtarget<X86Subtarget>();
----------------
Can we get this info from calling conversion?
Different calling conversions may use different argument registers.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110869/new/

https://reviews.llvm.org/D110869



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