[PATCH] D112534: [PoC][RISCV] Use an attribute to declare C intrinsics with different policy.

[Hsiangkai Wang via Phabricator via cfe-commits]

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This patch provides a proof-of-concept implementation of the proposal.
https://github.com/riscv-non-isa/rvv-intrinsic-doc/issues/120

In this patch, we create a new attribute rvv_policy to annotate C
intrinsics with its tail/inactive elements policy. The syntax is

__attribute__((rvv_policy(tama)))
vint32m1_t vadd_tama(...);

The possible policy is tama, tamu, tuma, tumu.
ta: tail agnostic
tu: tail undisturbed
ma: inactive masked-off agnostic
mu: inactive masked-off undisturbed

This attribute is used in riscv_vector.h.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D112534

Files:
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Basic/AttrDocs.td
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/RISCV/rvv-intrinsics/vadd-policy.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vadd-tu.c
  clang/utils/TableGen/RISCVVEmitter.cpp

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