[clang] e1fb134 - [WebAssembly] Add prototype relaxed float min max instructions
Thomas Lively via cfe-commits
cfe-commits at lists.llvm.org
Wed Oct 20 09:41:55 PDT 2021
Author: Zhi An Ng
Date: 2021-10-20T09:41:51-07:00
New Revision: e1fb13401e1b90a912ba83c6d1a82794cfdb8aec
URL: https://github.com/llvm/llvm-project/commit/e1fb13401e1b90a912ba83c6d1a82794cfdb8aec
DIFF: https://github.com/llvm/llvm-project/commit/e1fb13401e1b90a912ba83c6d1a82794cfdb8aec.diff
LOG: [WebAssembly] Add prototype relaxed float min max instructions
Add relaxed. f32x4.min, f32x4.max, f64x2.min, f64x2.max. These are only
exposed as builtins, and require user opt-in.
Differential Revision: https://reviews.llvm.org/D112146
Added:
Modified:
clang/include/clang/Basic/BuiltinsWebAssembly.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-wasm.c
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
llvm/test/MC/WebAssembly/simd-encodings.s
Removed:
################################################################################
diff --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def b/clang/include/clang/Basic/BuiltinsWebAssembly.def
index 0eecab3c31f26..c30a2a6060169 100644
--- a/clang/include/clang/Basic/BuiltinsWebAssembly.def
+++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def
@@ -174,5 +174,10 @@ TARGET_BUILTIN(__builtin_wasm_laneselect_i64x2, "V2LLiV2LLiV2LLiV2LLi", "nc", "r
TARGET_BUILTIN(__builtin_wasm_relaxed_swizzle_i8x16, "V16ScV16ScV16Sc", "nc", "relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_min_f32x4, "V4fV4fV4f", "nc", "relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_max_f32x4, "V4fV4fV4f", "nc", "relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_min_f64x2, "V2dV2dV2d", "nc", "relaxed-simd")
+TARGET_BUILTIN(__builtin_wasm_relaxed_max_f64x2, "V2dV2dV2d", "nc", "relaxed-simd")
+
#undef BUILTIN
#undef TARGET_BUILTIN
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 9ef9d4f1c2d9e..d20415f1ced6c 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18325,6 +18325,28 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_relaxed_swizzle);
return Builder.CreateCall(Callee, {Src, Indices});
}
+ case WebAssembly::BI__builtin_wasm_relaxed_min_f32x4:
+ case WebAssembly::BI__builtin_wasm_relaxed_max_f32x4:
+ case WebAssembly::BI__builtin_wasm_relaxed_min_f64x2:
+ case WebAssembly::BI__builtin_wasm_relaxed_max_f64x2: {
+ Value *LHS = EmitScalarExpr(E->getArg(0));
+ Value *RHS = EmitScalarExpr(E->getArg(1));
+ unsigned IntNo;
+ switch (BuiltinID) {
+ case WebAssembly::BI__builtin_wasm_relaxed_min_f32x4:
+ case WebAssembly::BI__builtin_wasm_relaxed_min_f64x2:
+ IntNo = Intrinsic::wasm_relaxed_min;
+ break;
+ case WebAssembly::BI__builtin_wasm_relaxed_max_f32x4:
+ case WebAssembly::BI__builtin_wasm_relaxed_max_f64x2:
+ IntNo = Intrinsic::wasm_relaxed_max;
+ break;
+ default:
+ llvm_unreachable("unexpected builtin ID");
+ }
+ Function *Callee = CGM.getIntrinsic(IntNo, LHS->getType());
+ return Builder.CreateCall(Callee, {LHS, RHS});
+ }
default:
return nullptr;
}
diff --git a/clang/test/CodeGen/builtins-wasm.c b/clang/test/CodeGen/builtins-wasm.c
index 489565ee09d15..8eb8522d90b5b 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -737,3 +737,31 @@ i8x16 relaxed_swizzle_i8x16(i8x16 x, i8x16 y) {
return __builtin_wasm_relaxed_swizzle_i8x16(x, y);
// WEBASSEMBLY: call <16 x i8> @llvm.wasm.relaxed.swizzle(<16 x i8> %x, <16 x i8> %y)
}
+
+f32x4 relaxed_min_f32x4(f32x4 a, f32x4 b) {
+ return __builtin_wasm_relaxed_min_f32x4(a, b);
+ // WEBASSEMBLY: call <4 x float> @llvm.wasm.relaxed.min.v4f32(
+ // WEBASSEMBLY-SAME: <4 x float> %a, <4 x float> %b)
+ // WEBASSEMBLY-NEXT: ret
+}
+
+f32x4 relaxed_max_f32x4(f32x4 a, f32x4 b) {
+ return __builtin_wasm_relaxed_max_f32x4(a, b);
+ // WEBASSEMBLY: call <4 x float> @llvm.wasm.relaxed.max.v4f32(
+ // WEBASSEMBLY-SAME: <4 x float> %a, <4 x float> %b)
+ // WEBASSEMBLY-NEXT: ret
+}
+
+f64x2 relaxed_min_f64x2(f64x2 a, f64x2 b) {
+ return __builtin_wasm_relaxed_min_f64x2(a, b);
+ // WEBASSEMBLY: call <2 x double> @llvm.wasm.relaxed.min.v2f64(
+ // WEBASSEMBLY-SAME: <2 x double> %a, <2 x double> %b)
+ // WEBASSEMBLY-NEXT: ret
+}
+
+f64x2 relaxed_max_f64x2(f64x2 a, f64x2 b) {
+ return __builtin_wasm_relaxed_max_f64x2(a, b);
+ // WEBASSEMBLY: call <2 x double> @llvm.wasm.relaxed.max.v2f64(
+ // WEBASSEMBLY-SAME: <2 x double> %a, <2 x double> %b)
+ // WEBASSEMBLY-NEXT: ret
+}
diff --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index d832195609f09..53d63a0d4dcc7 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -205,6 +205,15 @@ def int_wasm_relaxed_swizzle :
[llvm_v16i8_ty, llvm_v16i8_ty],
[IntrNoMem, IntrSpeculatable]>;
+def int_wasm_relaxed_min :
+ Intrinsic<[llvm_anyvector_ty],
+ [LLVMMatchType<0>, LLVMMatchType<0>],
+ [IntrNoMem, IntrSpeculatable]>;
+def int_wasm_relaxed_max :
+ Intrinsic<[llvm_anyvector_ty],
+ [LLVMMatchType<0>, LLVMMatchType<0>],
+ [IntrNoMem, IntrSpeculatable]>;
+
//===----------------------------------------------------------------------===//
// Thread-local storage intrinsics
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
index aee39423915f6..08ff73be0c249 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -1372,3 +1372,23 @@ defm RELAXED_SWIZZLE :
[(set (v16i8 V128:$dst),
(int_wasm_relaxed_swizzle (v16i8 V128:$src), (v16i8 V128:$mask)))],
"i8x16.relaxed_swizzle\t$dst, $src, $mask", "i8x16.relaxed_swizzle", 162>;
+
+//===----------------------------------------------------------------------===//
+// Relaxed floating-point min and max.
+//===----------------------------------------------------------------------===//
+
+multiclass SIMD_RELAXED_FMINMAX<Vec vec, bits<32> simdopMin, bits<32> simdopMax> {
+ defm RELAXED_FMIN_#vec :
+ RELAXED_I<(outs V128:$dst), (ins V128:$a, V128:$b), (outs), (ins),
+ [(set (vec.vt V128:$dst), (int_wasm_relaxed_min
+ (vec.vt V128:$a), (vec.vt V128:$b)))],
+ vec.prefix#".relaxed_min\t$dst, $a, $b", vec.prefix#".relaxed_min", simdopMin>;
+ defm RELAXED_FMAX_#vec :
+ RELAXED_I<(outs V128:$dst), (ins V128:$a, V128:$b), (outs), (ins),
+ [(set (vec.vt V128:$dst), (int_wasm_relaxed_max
+ (vec.vt V128:$a), (vec.vt V128:$b)))],
+ vec.prefix#".relaxed_max\t$dst, $a, $b", vec.prefix#".relaxed_max", simdopMax>;
+}
+
+defm "" : SIMD_RELAXED_FMINMAX<F32x4, 0xb4, 0xe2>;
+defm "" : SIMD_RELAXED_FMINMAX<F64x2, 0xd4, 0xee>;
diff --git a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
index 1f54aeac9a7fc..b69d9293a65c6 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
@@ -682,6 +682,30 @@ define <4 x float> @fms_v4f32(<4 x float> %a, <4 x float> %b, <4 x float> %c) {
ret <4 x float> %v
}
+; CHECK-LABEL: relaxed_min_v4f32:
+; CHECK-NEXT: .functype relaxed_min_v4f32 (v128, v128) -> (v128){{$}}
+; CHECK-NEXT: f32x4.relaxed_min $push[[R:[0-9]+]]=, $0, $1{{$}}
+; CHECK-NEXT: return $pop[[R]]{{$}}
+declare <4 x float> @llvm.wasm.relaxed.min.v4f32(<4 x float>, <4 x float>)
+define <4 x float> @relaxed_min_v4f32(<4 x float> %a, <4 x float> %b) {
+ %v = call <4 x float> @llvm.wasm.relaxed.min.v4f32(
+ <4 x float> %a, <4 x float> %b
+ )
+ ret <4 x float> %v
+}
+
+; CHECK-LABEL: relaxed_max_v4f32:
+; CHECK-NEXT: .functype relaxed_max_v4f32 (v128, v128) -> (v128){{$}}
+; CHECK-NEXT: f32x4.relaxed_max $push[[R:[0-9]+]]=, $0, $1{{$}}
+; CHECK-NEXT: return $pop[[R]]{{$}}
+declare <4 x float> @llvm.wasm.relaxed.max.v4f32(<4 x float>, <4 x float>)
+define <4 x float> @relaxed_max_v4f32(<4 x float> %a, <4 x float> %b) {
+ %v = call <4 x float> @llvm.wasm.relaxed.max.v4f32(
+ <4 x float> %a, <4 x float> %b
+ )
+ ret <4 x float> %v
+}
+
; ==============================================================================
; 2 x f64
; ==============================================================================
@@ -780,3 +804,27 @@ define <2 x double> @fms_v2f64(<2 x double> %a, <2 x double> %b, <2 x double> %c
)
ret <2 x double> %v
}
+
+; CHECK-LABEL: relaxed_min_v2f64:
+; CHECK-NEXT: .functype relaxed_min_v2f64 (v128, v128) -> (v128){{$}}
+; CHECK-NEXT: f64x2.relaxed_min $push[[R:[0-9]+]]=, $0, $1{{$}}
+; CHECK-NEXT: return $pop[[R]]{{$}}
+declare <2 x double> @llvm.wasm.relaxed.min.v2f64(<2 x double>, <2 x double>)
+define <2 x double> @relaxed_min_v2f64(<2 x double> %a, <2 x double> %b) {
+ %v = call <2 x double> @llvm.wasm.relaxed.min.v2f64(
+ <2 x double> %a, <2 x double> %b
+ )
+ ret <2 x double> %v
+}
+
+; CHECK-LABEL: relaxed_max_v2f64:
+; CHECK-NEXT: .functype relaxed_max_v2f64 (v128, v128) -> (v128){{$}}
+; CHECK-NEXT: f64x2.relaxed_max $push[[R:[0-9]+]]=, $0, $1{{$}}
+; CHECK-NEXT: return $pop[[R]]{{$}}
+declare <2 x double> @llvm.wasm.relaxed.max.v2f64(<2 x double>, <2 x double>)
+define <2 x double> @relaxed_max_v2f64(<2 x double> %a, <2 x double> %b) {
+ %v = call <2 x double> @llvm.wasm.relaxed.max.v2f64(
+ <2 x double> %a, <2 x double> %b
+ )
+ ret <2 x double> %v
+}
diff --git a/llvm/test/MC/WebAssembly/simd-encodings.s b/llvm/test/MC/WebAssembly/simd-encodings.s
index a7aa30047fc5a..d7b83348fdf75 100644
--- a/llvm/test/MC/WebAssembly/simd-encodings.s
+++ b/llvm/test/MC/WebAssembly/simd-encodings.s
@@ -806,4 +806,16 @@ main:
# CHECK: i8x16.relaxed_swizzle # encoding: [0xfd,0xa2,0x01]
i8x16.relaxed_swizzle
+ # CHECK: f32x4.relaxed_min # encoding: [0xfd,0xb4,0x01]
+ f32x4.relaxed_min
+
+ # CHECK: f32x4.relaxed_max # encoding: [0xfd,0xe2,0x01]
+ f32x4.relaxed_max
+
+ # CHECK: f64x2.relaxed_min # encoding: [0xfd,0xd4,0x01]
+ f64x2.relaxed_min
+
+ # CHECK: f64x2.relaxed_max # encoding: [0xfd,0xee,0x01]
+ f64x2.relaxed_max
+
end_function
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