[PATCH] D111734: [HIP] Relax conditions for address space cast in builtin args
Anshil Gandhi via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Fri Oct 15 09:57:10 PDT 2021
gandhi21299 updated this revision to Diff 380047.
gandhi21299 added a comment.
installed clang-format, refreshing patch
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D111734/new/
https://reviews.llvm.org/D111734
Files:
clang/include/clang/Basic/DiagnosticSemaKinds.td
clang/lib/Sema/SemaExpr.cpp
clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
Index: clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
===================================================================
--- /dev/null
+++ clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN: -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device %s \
+// RUN: -o -
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+ float *rtn;
+ *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
===================================================================
--- /dev/null
+++ clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -x hip \
+// RUN: -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device -emit-llvm %s \
+// RUN: -o - | FileCheck %s
+
+#define __device__ __attribute__((device))
+typedef __attribute__((address_space(3))) float *LP;
+
+// CHECK-LABEL: test_ds_atomic_add_f32
+// CHECK: %[[ADDR_ADDR:.*]] = alloca float*, align 8, addrspace(5)
+// CHECK: %[[ADDR_ADDR_ASCAST_PTR:.*]] = addrspacecast float* addrspace(5)* %[[ADDR_ADDR]] to float**
+// CHECK: store float* %addr, float** %[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[ADDR_ADDR_ASCAST:.*]] = load float*, float** %[[ADDR_ADDR_ASCAST_PTR]], align 8
+// CHECK: %[[AS_CAST:.*]] = addrspacecast float* %[[ADDR_ADDR_ASCAST]] to float addrspace(3)*
+// CHECK: %3 = call contract float @llvm.amdgcn.ds.fadd.f32(float addrspace(3)* %[[AS_CAST]]
+// CHECK: %4 = load float*, float** %rtn.ascast, align 8
+// CHECK: store float %3, float* %4, align 4
+__device__ void test_ds_atomic_add_f32(float *addr, float val) {
+ float *rtn;
+ *rtn = __builtin_amdgcn_ds_faddf((LP)addr, val, 0, 0, 0);
+}
Index: clang/lib/Sema/SemaExpr.cpp
===================================================================
--- clang/lib/Sema/SemaExpr.cpp
+++ clang/lib/Sema/SemaExpr.cpp
@@ -6545,9 +6545,13 @@
auto ArgPtTy = ArgTy->getPointeeType();
auto ArgAS = ArgPtTy.getAddressSpace();
- // Only allow implicit casting from a non-default address space pointee
- // type to a default address space pointee type
- if (ArgAS != LangAS::Default || ParamAS == LangAS::Default)
+ // Prevent addrspace cast if the parameter has a default address
+ // space, or the argument has a non-default addrspace and the
+ // target addrspaces of the argument and the parameter differ.
+ if ((ArgAS != LangAS::Default &&
+ getASTContext().getTargetAddressSpace(ArgAS) !=
+ getASTContext().getTargetAddressSpace(ParamAS)) ||
+ ParamAS == LangAS::Default)
continue;
// First, ensure that the Arg is an RValue.
Index: clang/include/clang/Basic/DiagnosticSemaKinds.td
===================================================================
--- clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -8374,6 +8374,7 @@
def err_deleted_inherited_ctor_use : Error<
"constructor inherited by %0 from base class %1 is implicitly deleted">;
+def note_no_addrspace_cast : Note<"skip address space cast">;
def note_called_by : Note<"called by %0">;
def err_kern_type_not_void_return : Error<
"kernel function type %0 must have void return type">;
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