[PATCH] D111790: [AArch64][Driver][SVE] Allow -msve-vector-bits=<n>+ syntax to mean no maximum vscale

[Bradley Smith via Phabricator via cfe-commits]

bsmith added a comment.

In D111790#3063698 <https://reviews.llvm.org/D111790#3063698>, @paulwalker-arm wrote:

> Are the references to "128-bit chunks" for the vscale flags necessary?  That's really a nuisance of SVE that LLVM IR should not need to worry about.  Can we speak exclusively in terms of vscale or is the "multiples of 128" required somewhere?  Perhaps we're missing a target specific convert function from vscale+elt to bytes or something.  Also there's nothing stoping vscale from being 3 (essentially any positive number) but you look to be restricting it to a power of two.

It does feel like we should have something somewhere that specifies the vscale chunk as I've had to hardcode 128 in a lot of places (thought they are SVE specific places, so I'll remove mention of it from the helptext). As for vscale values allowed, if we don't validate the values used in the option itself, where would we do it? I guess we could just blindly propagate the value down to the IR attribute and let the backends figure out what they want. The issue then is providing a nice error, though perhaps we don't need one given they are cc1 options?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111790/new/

https://reviews.llvm.org/D111790