[PATCH] D110451: [IR] Increase max alignment to 4GB

Arthur Eubanks via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Wed Oct 6 12:06:18 PDT 2021


aeubanks updated this revision to Diff 377633.
aeubanks added a comment.

update


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110451/new/

https://reviews.llvm.org/D110451

Files:
  clang/lib/CodeGen/CGBlocks.cpp
  clang/lib/CodeGen/CGCall.cpp
  clang/lib/CodeGen/CGDecl.cpp
  clang/lib/CodeGen/CodeGenModule.cpp
  clang/test/CodeGen/builtin-assume-aligned.c
  clang/test/CodeGen/catch-alignment-assumption-attribute-align_value-on-paramvar.cpp
  clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params-variable.cpp
  clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params.cpp
  clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-two-params.cpp
  llvm/include/llvm/Bitcode/BitcodeCommon.h
  llvm/include/llvm/IR/Argument.h
  llvm/include/llvm/IR/DataLayout.h
  llvm/include/llvm/IR/Function.h
  llvm/include/llvm/IR/GlobalObject.h
  llvm/include/llvm/IR/Instruction.h
  llvm/include/llvm/IR/Instructions.h
  llvm/include/llvm/IR/Value.h
  llvm/include/llvm/Transforms/IPO/Attributor.h
  llvm/include/llvm/Transforms/Utils/ASanStackFrameLayout.h
  llvm/lib/AsmParser/LLParser.cpp
  llvm/lib/Bitcode/Reader/BitcodeReader.cpp
  llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
  llvm/lib/CodeGen/MIRParser/MIParser.cpp
  llvm/lib/CodeGen/SafeStack.cpp
  llvm/lib/CodeGen/SafeStackLayout.cpp
  llvm/lib/CodeGen/SafeStackLayout.h
  llvm/lib/IR/DataLayout.cpp
  llvm/lib/IR/Function.cpp
  llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
  llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
  llvm/test/Assembler/align-inst-alloca.ll
  llvm/test/Assembler/align-inst-load.ll
  llvm/test/Assembler/align-inst-store.ll
  llvm/test/Assembler/align-inst.ll
  llvm/test/Bitcode/Inputs/invalid-align.bc
  llvm/test/Bitcode/inalloca.ll
  llvm/test/CodeGen/MIR/X86/load-with-1gb-alignment.mir
  llvm/test/CodeGen/MIR/X86/load-with-max-alignment.mir
  llvm/test/Transforms/Attributor/ArgumentPromotion/live_called_from_dead.ll
  llvm/test/Transforms/Attributor/ArgumentPromotion/live_called_from_dead_2.ll
  llvm/test/Transforms/Attributor/IPConstantProp/PR26044.ll
  llvm/test/Transforms/Attributor/IPConstantProp/pthreads.ll
  llvm/test/Transforms/Attributor/callbacks.ll
  llvm/test/Transforms/Attributor/liveness.ll
  llvm/test/Transforms/Attributor/memory_locations.ll
  llvm/test/Transforms/Attributor/noalias.ll
  llvm/test/Transforms/Attributor/nocapture-1.ll
  llvm/test/Transforms/Attributor/noundef.ll
  llvm/test/Transforms/Attributor/undefined_behavior.ll
  llvm/test/Transforms/Attributor/value-simplify.ll
  llvm/test/Transforms/GVN/PRE/2017-06-28-pre-load-dbgloc.ll
  llvm/test/Transforms/InstCombine/atomic.ll
  llvm/test/Transforms/InstCombine/getelementptr.ll
  llvm/test/Transforms/InstCombine/load.ll
  llvm/test/Transforms/InstCombine/mempcpy.ll
  llvm/test/Transforms/InstCombine/pr44245.ll
  llvm/test/Transforms/InstCombine/store.ll
  llvm/test/Transforms/OpenMP/parallel_level_fold.ll
  llvm/test/Verifier/align-md.ll
  llvm/unittests/IR/ValueTest.cpp

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