[clang] df84c1f - [IR] Increase max alignment to 4GB
Arthur Eubanks via cfe-commits
cfe-commits at lists.llvm.org
Wed Oct 6 09:58:54 PDT 2021
Author: Arthur Eubanks
Date: 2021-10-06T09:54:14-07:00
New Revision: df84c1fe78130a86445d57563dea742e1b85156a
URL: https://github.com/llvm/llvm-project/commit/df84c1fe78130a86445d57563dea742e1b85156a
DIFF: https://github.com/llvm/llvm-project/commit/df84c1fe78130a86445d57563dea742e1b85156a.diff
LOG: [IR] Increase max alignment to 4GB
Currently the max alignment representable is 1GB, see D108661.
Setting the align of an object to 4GB is desirable in some cases to make sure the lower 32 bits are clear which can be used for some optimizations, e.g. https://crbug.com/1016945.
This uses an extra bit in instructions that carry an alignment. We can store 15 bits of "free" information, and with this change some instructions (e.g. AtomicCmpXchgInst) use 14 bits.
We can increase the max alignment representable above 4GB (up to 2^62) since we're only using 33 of the 64 values, but I've just limited it to 4GB for now.
The one place we have to update the bitcode format is for the alloca instruction. It stores its alignment into 5 bits of a 32 bit bitfield. I've added another field which is 8 bits and should be future proof for a while. For backward compatibility, we check if the old field has a value and use that, otherwise use the new field.
Updating clang's max allowed alignment will come in a future patch.
Reviewed By: hans
Differential Revision: https://reviews.llvm.org/D110451
Added:
llvm/test/CodeGen/MIR/X86/load-with-max-alignment.mir
Modified:
clang/lib/CodeGen/CGBlocks.cpp
clang/lib/CodeGen/CGCall.cpp
clang/lib/CodeGen/CGDecl.cpp
clang/lib/CodeGen/CodeGenModule.cpp
llvm/include/llvm/Bitcode/BitcodeCommon.h
llvm/include/llvm/IR/DataLayout.h
llvm/include/llvm/IR/GlobalObject.h
llvm/include/llvm/IR/Instruction.h
llvm/include/llvm/IR/Instructions.h
llvm/include/llvm/IR/Value.h
llvm/include/llvm/Transforms/IPO/Attributor.h
llvm/lib/AsmParser/LLParser.cpp
llvm/lib/Bitcode/Reader/BitcodeReader.cpp
llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
llvm/lib/CodeGen/MIRParser/MIParser.cpp
llvm/lib/CodeGen/SafeStack.cpp
llvm/lib/IR/DataLayout.cpp
llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
llvm/test/Assembler/align-inst-alloca.ll
llvm/test/Assembler/align-inst-load.ll
llvm/test/Assembler/align-inst-store.ll
llvm/test/Assembler/align-inst.ll
llvm/test/Bitcode/Inputs/invalid-align.bc
llvm/test/Bitcode/inalloca.ll
llvm/test/Transforms/Attributor/ArgumentPromotion/live_called_from_dead.ll
llvm/test/Transforms/Attributor/ArgumentPromotion/live_called_from_dead_2.ll
llvm/test/Transforms/Attributor/IPConstantProp/PR26044.ll
llvm/test/Transforms/Attributor/IPConstantProp/pthreads.ll
llvm/test/Transforms/Attributor/callbacks.ll
llvm/test/Transforms/Attributor/liveness.ll
llvm/test/Transforms/Attributor/memory_locations.ll
llvm/test/Transforms/Attributor/noalias.ll
llvm/test/Transforms/Attributor/nocapture-1.ll
llvm/test/Transforms/Attributor/noundef.ll
llvm/test/Transforms/Attributor/undefined_behavior.ll
llvm/test/Transforms/Attributor/value-simplify.ll
llvm/test/Transforms/GVN/PRE/2017-06-28-pre-load-dbgloc.ll
llvm/test/Transforms/InstCombine/atomic.ll
llvm/test/Transforms/InstCombine/getelementptr.ll
llvm/test/Transforms/InstCombine/load.ll
llvm/test/Transforms/InstCombine/mempcpy.ll
llvm/test/Transforms/InstCombine/pr44245.ll
llvm/test/Transforms/InstCombine/store.ll
llvm/test/Transforms/OpenMP/parallel_level_fold.ll
llvm/test/Verifier/align-md.ll
llvm/unittests/IR/ValueTest.cpp
Removed:
llvm/test/CodeGen/MIR/X86/load-with-1gb-alignment.mir
################################################################################
diff --git a/clang/lib/CodeGen/CGBlocks.cpp b/clang/lib/CodeGen/CGBlocks.cpp
index c8bf47fdc837..2da2014345d8 100644
--- a/clang/lib/CodeGen/CGBlocks.cpp
+++ b/clang/lib/CodeGen/CGBlocks.cpp
@@ -2695,8 +2695,8 @@ const BlockByrefInfo &CodeGenFunction::getBlockByrefInfo(const VarDecl *D) {
size = varOffset;
// Conversely, we might have to prevent LLVM from inserting padding.
- } else if (CGM.getDataLayout().getABITypeAlignment(varTy)
- > varAlign.getQuantity()) {
+ } else if (CGM.getDataLayout().getABITypeAlignment(varTy) >
+ uint64_t(varAlign.getQuantity())) {
packed = true;
}
types.push_back(varTy);
diff --git a/clang/lib/CodeGen/CGCall.cpp b/clang/lib/CodeGen/CGCall.cpp
index ee0a66919c31..70966c9e7b35 100644
--- a/clang/lib/CodeGen/CGCall.cpp
+++ b/clang/lib/CodeGen/CGCall.cpp
@@ -5021,12 +5021,12 @@ RValue CodeGenFunction::EmitCall(const CGFunctionInfo &CallInfo,
auto scalarAlign = CGM.getDataLayout().getPrefTypeAlignment(scalarType);
// Materialize to a temporary.
- addr = CreateTempAlloca(
- RV.getScalarVal()->getType(),
- CharUnits::fromQuantity(std::max(
- (unsigned)layout->getAlignment().value(), scalarAlign)),
- "tmp",
- /*ArraySize=*/nullptr, &AllocaAddr);
+ addr =
+ CreateTempAlloca(RV.getScalarVal()->getType(),
+ CharUnits::fromQuantity(std::max(
+ layout->getAlignment().value(), scalarAlign)),
+ "tmp",
+ /*ArraySize=*/nullptr, &AllocaAddr);
tempSize = EmitLifetimeStart(scalarSize, AllocaAddr.getPointer());
Builder.CreateStore(RV.getScalarVal(), addr);
diff --git a/clang/lib/CodeGen/CGDecl.cpp b/clang/lib/CodeGen/CGDecl.cpp
index 5b3d39f20b41..dfb74a3fc654 100644
--- a/clang/lib/CodeGen/CGDecl.cpp
+++ b/clang/lib/CodeGen/CGDecl.cpp
@@ -1142,7 +1142,7 @@ Address CodeGenModule::createUnnamedGlobalFrom(const VarDecl &D,
GV->setAlignment(Align.getAsAlign());
GV->setUnnamedAddr(llvm::GlobalValue::UnnamedAddr::Global);
CacheEntry = GV;
- } else if (CacheEntry->getAlignment() < Align.getQuantity()) {
+ } else if (CacheEntry->getAlignment() < uint64_t(Align.getQuantity())) {
CacheEntry->setAlignment(Align.getAsAlign());
}
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp b/clang/lib/CodeGen/CodeGenModule.cpp
index d26b1343247f..d4e3186c10a5 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -5386,7 +5386,7 @@ CodeGenModule::GetAddrOfConstantStringFromLiteral(const StringLiteral *S,
if (!LangOpts.WritableStrings) {
Entry = &ConstantStringMap[C];
if (auto GV = *Entry) {
- if (Alignment.getQuantity() > GV->getAlignment())
+ if (uint64_t(Alignment.getQuantity()) > GV->getAlignment())
GV->setAlignment(Alignment.getAsAlign());
return ConstantAddress(castStringLiteralToDefaultAddressSpace(*this, GV),
Alignment);
@@ -5449,7 +5449,7 @@ ConstantAddress CodeGenModule::GetAddrOfConstantCString(
if (!LangOpts.WritableStrings) {
Entry = &ConstantStringMap[C];
if (auto GV = *Entry) {
- if (Alignment.getQuantity() > GV->getAlignment())
+ if (uint64_t(Alignment.getQuantity()) > GV->getAlignment())
GV->setAlignment(Alignment.getAsAlign());
return ConstantAddress(castStringLiteralToDefaultAddressSpace(*this, GV),
Alignment);
diff --git a/llvm/include/llvm/Bitcode/BitcodeCommon.h b/llvm/include/llvm/Bitcode/BitcodeCommon.h
index 6a3e74550bc4..22d1872fe49c 100644
--- a/llvm/include/llvm/Bitcode/BitcodeCommon.h
+++ b/llvm/include/llvm/Bitcode/BitcodeCommon.h
@@ -19,10 +19,14 @@
namespace llvm {
struct AllocaPackedValues {
- using Align = Bitfield::Element<unsigned, 0, 5>;
- using UsedWithInAlloca = Bitfield::Element<bool, Align::NextBit, 1>;
+ // We increased the number of bits needed to represent alignment to be more
+ // than 5, but to preserve backward compatibility we store the upper bits
+ // separately.
+ using AlignLower = Bitfield::Element<unsigned, 0, 5>;
+ using UsedWithInAlloca = Bitfield::Element<bool, AlignLower::NextBit, 1>;
using ExplicitType = Bitfield::Element<bool, UsedWithInAlloca::NextBit, 1>;
using SwiftError = Bitfield::Element<bool, ExplicitType::NextBit, 1>;
+ using AlignUpper = Bitfield::Element<unsigned, SwiftError::NextBit, 3>;
};
} // namespace llvm
diff --git a/llvm/include/llvm/IR/DataLayout.h b/llvm/include/llvm/IR/DataLayout.h
index 8c37aebc2c4e..0486b19cd23d 100644
--- a/llvm/include/llvm/IR/DataLayout.h
+++ b/llvm/include/llvm/IR/DataLayout.h
@@ -518,7 +518,7 @@ class DataLayout {
/// Returns the minimum ABI-required alignment for the specified type.
/// FIXME: Deprecate this function once migration to Align is over.
- unsigned getABITypeAlignment(Type *Ty) const;
+ uint64_t getABITypeAlignment(Type *Ty) const;
/// Returns the minimum ABI-required alignment for the specified type.
Align getABITypeAlign(Type *Ty) const;
@@ -541,7 +541,7 @@ class DataLayout {
///
/// This is always at least as good as the ABI alignment.
/// FIXME: Deprecate this function once migration to Align is over.
- unsigned getPrefTypeAlignment(Type *Ty) const;
+ uint64_t getPrefTypeAlignment(Type *Ty) const;
/// Returns the preferred stack/global alignment for the specified
/// type.
diff --git a/llvm/include/llvm/IR/GlobalObject.h b/llvm/include/llvm/IR/GlobalObject.h
index 341fbec66080..130196bb6c4a 100644
--- a/llvm/include/llvm/IR/GlobalObject.h
+++ b/llvm/include/llvm/IR/GlobalObject.h
@@ -51,7 +51,7 @@ class GlobalObject : public GlobalValue {
Comdat *ObjComdat;
enum {
- LastAlignmentBit = 4,
+ LastAlignmentBit = 5,
HasSectionHashEntryBit,
GlobalObjectBits,
@@ -68,7 +68,7 @@ class GlobalObject : public GlobalValue {
GlobalObject(const GlobalObject &) = delete;
/// FIXME: Remove this function once transition to Align is over.
- unsigned getAlignment() const {
+ uint64_t getAlignment() const {
MaybeAlign Align = getAlign();
return Align ? Align->value() : 0;
}
diff --git a/llvm/include/llvm/IR/Instruction.h b/llvm/include/llvm/IR/Instruction.h
index 88d33f3c8adb..9ca7b530bf71 100644
--- a/llvm/include/llvm/IR/Instruction.h
+++ b/llvm/include/llvm/IR/Instruction.h
@@ -59,11 +59,11 @@ class Instruction : public User,
// Template alias so that all Instruction storing alignment use the same
// definiton.
// Valid alignments are powers of two from 2^0 to 2^MaxAlignmentExponent =
- // 2^30. We store them as Log2(Alignment), so we need 5 bits to encode the 31
+ // 2^32. We store them as Log2(Alignment), so we need 6 bits to encode the 33
// possible values.
template <unsigned Offset>
using AlignmentBitfieldElementT =
- typename Bitfield::Element<unsigned, Offset, 5,
+ typename Bitfield::Element<unsigned, Offset, 6,
Value::MaxAlignmentExponent>;
template <unsigned Offset>
diff --git a/llvm/include/llvm/IR/Instructions.h b/llvm/include/llvm/IR/Instructions.h
index 731198da7f40..aa8613fbdb88 100644
--- a/llvm/include/llvm/IR/Instructions.h
+++ b/llvm/include/llvm/IR/Instructions.h
@@ -126,7 +126,7 @@ class AllocaInst : public UnaryInstruction {
}
// FIXME: Remove this one transition to Align is over.
- unsigned getAlignment() const { return getAlign().value(); }
+ uint64_t getAlignment() const { return getAlign().value(); }
/// Return true if this alloca is in the entry block of the function and is a
/// constant size. If so, the code generator will fold it into the
@@ -217,7 +217,7 @@ class LoadInst : public UnaryInstruction {
/// Return the alignment of the access that is being performed.
/// FIXME: Remove this function once transition to Align is over.
/// Use getAlign() instead.
- unsigned getAlignment() const { return getAlign().value(); }
+ uint64_t getAlignment() const { return getAlign().value(); }
/// Return the alignment of the access that is being performed.
Align getAlign() const {
@@ -348,7 +348,7 @@ class StoreInst : public Instruction {
/// Return the alignment of the access that is being performed
/// FIXME: Remove this function once transition to Align is over.
/// Use getAlign() instead.
- unsigned getAlignment() const { return getAlign().value(); }
+ uint64_t getAlignment() const { return getAlign().value(); }
Align getAlign() const {
return Align(1ULL << (getSubclassData<AlignmentField>()));
diff --git a/llvm/include/llvm/IR/Value.h b/llvm/include/llvm/IR/Value.h
index 253c97c3b5e3..2cb4d09c295b 100644
--- a/llvm/include/llvm/IR/Value.h
+++ b/llvm/include/llvm/IR/Value.h
@@ -785,8 +785,8 @@ class Value {
///
/// This is the greatest alignment value supported by load, store, and alloca
/// instructions, and global values.
- static constexpr unsigned MaxAlignmentExponent = 30;
- static constexpr unsigned MaximumAlignment = 1u << MaxAlignmentExponent;
+ static constexpr unsigned MaxAlignmentExponent = 32;
+ static constexpr uint64_t MaximumAlignment = 1ULL << MaxAlignmentExponent;
/// Mutate the type of this Value to be of the specified type.
///
diff --git a/llvm/include/llvm/Transforms/IPO/Attributor.h b/llvm/include/llvm/Transforms/IPO/Attributor.h
index 59ea407e2814..5ee5fc3aed96 100644
--- a/llvm/include/llvm/Transforms/IPO/Attributor.h
+++ b/llvm/include/llvm/Transforms/IPO/Attributor.h
@@ -3413,7 +3413,7 @@ struct AADereferenceable
};
using AAAlignmentStateType =
- IncIntegerState<uint32_t, Value::MaximumAlignment, 1>;
+ IncIntegerState<uint64_t, Value::MaximumAlignment, 1>;
/// An abstract interface for all align attributes.
struct AAAlign : public IRAttribute<
Attribute::Alignment,
@@ -3421,10 +3421,10 @@ struct AAAlign : public IRAttribute<
AAAlign(const IRPosition &IRP, Attributor &A) : IRAttribute(IRP) {}
/// Return assumed alignment.
- unsigned getAssumedAlign() const { return getAssumed(); }
+ uint64_t getAssumedAlign() const { return getAssumed(); }
/// Return known alignment.
- unsigned getKnownAlign() const { return getKnown(); }
+ uint64_t getKnownAlign() const { return getKnown(); }
/// See AbstractAttribute::getName()
const std::string getName() const override { return "AAAlign"; }
diff --git a/llvm/lib/AsmParser/LLParser.cpp b/llvm/lib/AsmParser/LLParser.cpp
index ebca7f308381..924c83079e3c 100644
--- a/llvm/lib/AsmParser/LLParser.cpp
+++ b/llvm/lib/AsmParser/LLParser.cpp
@@ -1927,7 +1927,7 @@ bool LLParser::parseOptionalAlignment(MaybeAlign &Alignment, bool AllowParens) {
if (!EatIfPresent(lltok::kw_align))
return false;
LocTy AlignLoc = Lex.getLoc();
- uint32_t Value = 0;
+ uint64_t Value = 0;
LocTy ParenLoc = Lex.getLoc();
bool HaveParens = false;
@@ -1936,13 +1936,13 @@ bool LLParser::parseOptionalAlignment(MaybeAlign &Alignment, bool AllowParens) {
HaveParens = true;
}
- if (parseUInt32(Value))
+ if (parseUInt64(Value))
return true;
if (HaveParens && !EatIfPresent(lltok::rparen))
return error(ParenLoc, "expected ')'");
- if (!isPowerOf2_32(Value))
+ if (!isPowerOf2_64(Value))
return error(AlignLoc, "alignment is not a power of two");
if (Value > Value::MaximumAlignment)
return error(AlignLoc, "huge alignments are not supported yet");
diff --git a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp
index 1b1160569bb6..f5503d6e8eeb 100644
--- a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp
+++ b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp
@@ -4930,8 +4930,10 @@ Error BitcodeReader::parseFunctionBody(Function *F) {
Type *OpTy = getTypeByID(Record[1]);
Value *Size = getFnValueByID(Record[2], OpTy);
MaybeAlign Align;
- if (Error Err =
- parseAlignmentValue(Bitfield::get<APV::Align>(Rec), Align)) {
+ uint64_t AlignExp =
+ Bitfield::get<APV::AlignLower>(Rec) |
+ (Bitfield::get<APV::AlignUpper>(Rec) << APV::AlignLower::Bits);
+ if (Error Err = parseAlignmentValue(AlignExp, Align)) {
return Err;
}
if (!Ty || !Size)
diff --git a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
index dcab20b4b585..37a20d0400b5 100644
--- a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+++ b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
@@ -3055,7 +3055,11 @@ void ModuleBitcodeWriter::writeInstruction(const Instruction &I,
Vals.push_back(VE.getValueID(I.getOperand(0))); // size.
using APV = AllocaPackedValues;
unsigned Record = 0;
- Bitfield::set<APV::Align>(Record, getEncodedAlign(AI.getAlign()));
+ unsigned EncodedAlign = getEncodedAlign(AI.getAlign());
+ Bitfield::set<APV::AlignLower>(
+ Record, EncodedAlign & ((1 << APV::AlignLower::Bits) - 1));
+ Bitfield::set<APV::AlignUpper>(Record,
+ EncodedAlign >> APV::AlignLower::Bits);
Bitfield::set<APV::UsedWithInAlloca>(Record, AI.isUsedWithInAlloca());
Bitfield::set<APV::ExplicitType>(Record, true);
Bitfield::set<APV::SwiftError>(Record, AI.isSwiftError());
diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index 34e1f9225d42..3dc91b3b87e9 100644
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -498,7 +498,7 @@ class MIParser {
MachineOperand &Dest,
Optional<unsigned> &TiedDefIdx);
bool parseOffset(int64_t &Offset);
- bool parseAlignment(unsigned &Alignment);
+ bool parseAlignment(uint64_t &Alignment);
bool parseAddrspace(unsigned &Addrspace);
bool parseSectionID(Optional<MBBSectionID> &SID);
bool parseOperandsOffset(MachineOperand &Op);
@@ -676,7 +676,7 @@ bool MIParser::parseBasicBlockDefinition(
bool IsLandingPad = false;
bool IsEHFuncletEntry = false;
Optional<MBBSectionID> SectionID;
- unsigned Alignment = 0;
+ uint64_t Alignment = 0;
BasicBlock *BB = nullptr;
if (consumeIfPresent(MIToken::lparen)) {
do {
@@ -2898,16 +2898,16 @@ bool MIParser::parseOffset(int64_t &Offset) {
return false;
}
-bool MIParser::parseAlignment(unsigned &Alignment) {
+bool MIParser::parseAlignment(uint64_t &Alignment) {
assert(Token.is(MIToken::kw_align) || Token.is(MIToken::kw_basealign));
lex();
if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
return error("expected an integer literal after 'align'");
- if (getUnsigned(Alignment))
+ if (getUint64(Alignment))
return true;
lex();
- if (!isPowerOf2_32(Alignment))
+ if (!isPowerOf2_64(Alignment))
return error("expected a power-of-2 literal after 'align'");
return false;
@@ -3261,7 +3261,7 @@ bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {
if (parseMachinePointerInfo(Ptr))
return true;
}
- unsigned BaseAlignment =
+ uint64_t BaseAlignment =
(Size != MemoryLocation::UnknownSize ? PowerOf2Ceil(Size) : 1);
AAMDNodes AAInfo;
MDNode *Range = nullptr;
diff --git a/llvm/lib/CodeGen/SafeStack.cpp b/llvm/lib/CodeGen/SafeStack.cpp
index 94add920f284..e1d11c36e1a9 100644
--- a/llvm/lib/CodeGen/SafeStack.cpp
+++ b/llvm/lib/CodeGen/SafeStack.cpp
@@ -147,7 +147,7 @@ class SafeStack {
///
/// 16 seems like a reasonable upper bound on the alignment of objects that we
/// might expect to appear on the stack on most common targets.
- enum { StackAlignment = 16 };
+ static constexpr uint64_t StackAlignment = 16;
/// Return the value of the stack canary.
Value *getStackGuard(IRBuilder<> &IRB, Function &F);
@@ -544,8 +544,7 @@ Value *SafeStack::moveStaticAllocasToUnsafeStack(
Size = 1; // Don't create zero-sized stack objects.
// Ensure the object is properly aligned.
- unsigned Align =
- std::max((unsigned)DL.getPrefTypeAlignment(Ty), AI->getAlignment());
+ uint64_t Align = std::max(DL.getPrefTypeAlignment(Ty), AI->getAlignment());
SSL.addObject(AI, Size, Align,
ClColoring ? SSC.getLiveRange(AI) : NoColoringRange);
@@ -676,9 +675,9 @@ void SafeStack::moveDynamicAllocasToUnsafeStack(
SP = IRB.CreateSub(SP, Size);
// Align the SP value to satisfy the AllocaInst, type and stack alignments.
- unsigned Align = std::max(
- std::max((unsigned)DL.getPrefTypeAlignment(Ty), AI->getAlignment()),
- (unsigned)StackAlignment);
+ uint64_t Align =
+ std::max(std::max(DL.getPrefTypeAlignment(Ty), AI->getAlignment()),
+ StackAlignment);
assert(isPowerOf2_32(Align));
Value *NewTop = IRB.CreateIntToPtr(
diff --git a/llvm/lib/IR/DataLayout.cpp b/llvm/lib/IR/DataLayout.cpp
index d2bdd2a0d4e0..e50423d07a71 100644
--- a/llvm/lib/IR/DataLayout.cpp
+++ b/llvm/lib/IR/DataLayout.cpp
@@ -819,7 +819,7 @@ Align DataLayout::getAlignment(Type *Ty, bool abi_or_pref) const {
}
/// TODO: Remove this function once the transition to Align is over.
-unsigned DataLayout::getABITypeAlignment(Type *Ty) const {
+uint64_t DataLayout::getABITypeAlignment(Type *Ty) const {
return getABITypeAlign(Ty).value();
}
@@ -828,7 +828,7 @@ Align DataLayout::getABITypeAlign(Type *Ty) const {
}
/// TODO: Remove this function once the transition to Align is over.
-unsigned DataLayout::getPrefTypeAlignment(Type *Ty) const {
+uint64_t DataLayout::getPrefTypeAlignment(Type *Ty) const {
return getPrefTypeAlign(Ty).value();
}
diff --git a/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
index c6b2a91982fb..74f5d8476277 100644
--- a/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
@@ -176,7 +176,7 @@ const char kAMDGPUAddressPrivateName[] = "llvm.amdgcn.is.private";
// Accesses sizes are powers of two: 1, 2, 4, 8, 16.
static const size_t kNumberOfAccessSizes = 5;
-static const unsigned kAllocaRzSize = 32;
+static const uint64_t kAllocaRzSize = 32;
// ASanAccessInfo implementation constants.
constexpr size_t kCompileKernelShift = 0;
@@ -3578,7 +3578,7 @@ void FunctionStackPoisoner::poisonAlloca(Value *V, uint64_t Size,
void FunctionStackPoisoner::handleDynamicAllocaCall(AllocaInst *AI) {
IRBuilder<> IRB(AI);
- const unsigned Alignment = std::max(kAllocaRzSize, AI->getAlignment());
+ const uint64_t Alignment = std::max(kAllocaRzSize, AI->getAlignment());
const uint64_t AllocaRedzoneMask = kAllocaRzSize - 1;
Value *Zero = Constant::getNullValue(IntptrTy);
diff --git a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
index 70f078aefcf2..eeb71ed67cc9 100644
--- a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
@@ -356,7 +356,7 @@ class HWAddressSanitizer {
bool WithFrameRecord;
void init(Triple &TargetTriple, bool InstrumentWithCalls);
- unsigned getObjectAlignment() const { return 1U << Scale; }
+ uint64_t getObjectAlignment() const { return 1ULL << Scale; }
};
ShadowMapping Mapping;
diff --git a/llvm/test/Assembler/align-inst-alloca.ll b/llvm/test/Assembler/align-inst-alloca.ll
index f27e0dc9a145..1f9d16c741f8 100644
--- a/llvm/test/Assembler/align-inst-alloca.ll
+++ b/llvm/test/Assembler/align-inst-alloca.ll
@@ -1,6 +1,6 @@
; RUN: not llvm-as %s -o /dev/null 2>/dev/null
define void @foo() {
- %p = alloca i1, align 2147483648
+ %p = alloca i1, align 8589934592
ret void
}
diff --git a/llvm/test/Assembler/align-inst-load.ll b/llvm/test/Assembler/align-inst-load.ll
index e8d52f141a4e..fcd6a78d1b9d 100644
--- a/llvm/test/Assembler/align-inst-load.ll
+++ b/llvm/test/Assembler/align-inst-load.ll
@@ -1,6 +1,6 @@
; RUN: not llvm-as %s -o /dev/null 2>/dev/null
define void @foo(i1* %p) {
- load i1, i1* %p, align 2147483648
+ load i1, i1* %p, align 8589934592
ret void
}
diff --git a/llvm/test/Assembler/align-inst-store.ll b/llvm/test/Assembler/align-inst-store.ll
index 5d29911140a2..f39fac2d989a 100644
--- a/llvm/test/Assembler/align-inst-store.ll
+++ b/llvm/test/Assembler/align-inst-store.ll
@@ -1,6 +1,6 @@
; RUN: not llvm-as %s -o /dev/null 2>/dev/null
define void @foo(i1* %p) {
- store i1 false, i1* %p, align 2147483648
+ store i1 false, i1* %p, align 8589934592
ret void
}
diff --git a/llvm/test/Assembler/align-inst.ll b/llvm/test/Assembler/align-inst.ll
index 6471d76c9fa8..ba81e319cfd7 100644
--- a/llvm/test/Assembler/align-inst.ll
+++ b/llvm/test/Assembler/align-inst.ll
@@ -1,11 +1,11 @@
; RUN: llvm-as %s -o /dev/null
; RUN: verify-uselistorder %s
- at A = global i1 0, align 1073741824
+ at A = global i1 0, align 4294967296
define void @foo() {
- %p = alloca i1, align 1073741824
- load i1, i1* %p, align 1073741824
- store i1 false, i1* %p, align 1073741824
+ %p = alloca i1, align 4294967296
+ load i1, i1* %p, align 4294967296
+ store i1 false, i1* %p, align 4294967296
ret void
}
diff --git a/llvm/test/Bitcode/Inputs/invalid-align.bc b/llvm/test/Bitcode/Inputs/invalid-align.bc
index e84fa6cdda5f..5356ea4ed33d 100644
Binary files a/llvm/test/Bitcode/Inputs/invalid-align.bc and b/llvm/test/Bitcode/Inputs/invalid-align.bc
diff er
diff --git a/llvm/test/Bitcode/inalloca.ll b/llvm/test/Bitcode/inalloca.ll
index 351add158041..d69b6c9d2478 100644
--- a/llvm/test/Bitcode/inalloca.ll
+++ b/llvm/test/Bitcode/inalloca.ll
@@ -10,10 +10,10 @@ define void @foo(i32* inalloca(i32) %args) {
define void @bar() {
; Use the maximum alignment, since we stuff our bit with alignment.
- %args = alloca inalloca i32, align 1073741824
+ %args = alloca inalloca i32, align 4294967296
call void @foo(i32* inalloca(i32) %args)
ret void
}
; CHECK-LABEL: define void @bar() {
-; CHECK: %args = alloca inalloca i32, align 1073741824
+; CHECK: %args = alloca inalloca i32, align 4294967296
; CHECK: call void @foo(i32* inalloca(i32) %args)
diff --git a/llvm/test/CodeGen/MIR/X86/load-with-1gb-alignment.mir b/llvm/test/CodeGen/MIR/X86/load-with-max-alignment.mir
similarity index 79%
rename from llvm/test/CodeGen/MIR/X86/load-with-1gb-alignment.mir
rename to llvm/test/CodeGen/MIR/X86/load-with-max-alignment.mir
index f5490e4da69a..adb4059eb7e3 100644
--- a/llvm/test/CodeGen/MIR/X86/load-with-1gb-alignment.mir
+++ b/llvm/test/CodeGen/MIR/X86/load-with-max-alignment.mir
@@ -1,10 +1,10 @@
# RUN: llc -march=x86-64 -run-pass=none -o - %s | FileCheck %s
# CHECK: name: truly_aligned_load
-# CHECK: MOV32rm {{.*}} :: (load (s32), align 1073741824)
+# CHECK: MOV32rm {{.*}} :: (load (s32), align 4294967296)
# CHECK: name: basealigned_load
-# CHECK: MOV32rm {{.*}} :: (load (s32) from unknown-address + 4, basealign 1073741824)
+# CHECK: MOV32rm {{.*}} :: (load (s32) from unknown-address + 4, basealign 4294967296)
---
name: truly_aligned_load
@@ -20,7 +20,7 @@ body: |
bb.0:
liveins: $rdi
- renamable $eax = MOV32rm killed renamable $rdi, 1, $noreg, 0, $noreg :: (load (s32) from unknown-address, align 1073741824)
+ renamable $eax = MOV32rm killed renamable $rdi, 1, $noreg, 0, $noreg :: (load (s32) from unknown-address, align 4294967296)
RETQ $eax
...
@@ -38,7 +38,7 @@ body: |
bb.0:
liveins: $rdi
- renamable $eax = MOV32rm killed renamable $rdi, 1, $noreg, 0, $noreg :: (load (s32) from unknown-address + 4, basealign 1073741824)
+ renamable $eax = MOV32rm killed renamable $rdi, 1, $noreg, 0, $noreg :: (load (s32) from unknown-address + 4, basealign 4294967296)
RETQ $eax
...
diff --git a/llvm/test/Transforms/Attributor/ArgumentPromotion/live_called_from_dead.ll b/llvm/test/Transforms/Attributor/ArgumentPromotion/live_called_from_dead.ll
index 28342a655719..18a2de01c532 100644
--- a/llvm/test/Transforms/Attributor/ArgumentPromotion/live_called_from_dead.ll
+++ b/llvm/test/Transforms/Attributor/ArgumentPromotion/live_called_from_dead.ll
@@ -7,7 +7,7 @@
define internal void @dead() {
; IS__CGSCC____-LABEL: define {{[^@]+}}@dead() {
-; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test(i32* noalias noundef align 1073741824 null)
+; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test(i32* noalias noundef align 4294967296 null)
; IS__CGSCC____-NEXT: ret void
;
call i32 @test(i32* null, i32* null)
diff --git a/llvm/test/Transforms/Attributor/ArgumentPromotion/live_called_from_dead_2.ll b/llvm/test/Transforms/Attributor/ArgumentPromotion/live_called_from_dead_2.ll
index 795a065c7785..8d27ad5e73a9 100644
--- a/llvm/test/Transforms/Attributor/ArgumentPromotion/live_called_from_dead_2.ll
+++ b/llvm/test/Transforms/Attributor/ArgumentPromotion/live_called_from_dead_2.ll
@@ -7,7 +7,7 @@
define internal void @dead() {
; IS__CGSCC____-LABEL: define {{[^@]+}}@dead() {
-; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test(i32* noalias noundef align 1073741824 null)
+; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test(i32* noalias noundef align 4294967296 null)
; IS__CGSCC____-NEXT: ret void
;
call i32 @test(i32* null, i32* null)
diff --git a/llvm/test/Transforms/Attributor/IPConstantProp/PR26044.ll b/llvm/test/Transforms/Attributor/IPConstantProp/PR26044.ll
index 5dba5d25df55..4d2af622fa7a 100644
--- a/llvm/test/Transforms/Attributor/IPConstantProp/PR26044.ll
+++ b/llvm/test/Transforms/Attributor/IPConstantProp/PR26044.ll
@@ -153,7 +153,7 @@ define void @fn_no_null_opt(i32* %P, i1 %C) null_pointer_is_valid {
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[IF_END]], label [[EXIT:%.*]]
; IS__CGSCC_OPM: if.end:
; IS__CGSCC_OPM-NEXT: [[E_2:%.*]] = phi i32* [ undef, [[ENTRY:%.*]] ], [ null, [[FOR_COND1:%.*]] ]
-; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* null, align 1073741824
+; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* null, align 4294967296
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32 @fn0(i32 [[TMP0]])
; IS__CGSCC_OPM-NEXT: store i32 [[CALL]], i32* [[P]], align 4
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND1]]
@@ -169,7 +169,7 @@ define void @fn_no_null_opt(i32* %P, i1 %C) null_pointer_is_valid {
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[IF_END]], label [[EXIT:%.*]]
; IS__CGSCC_NPM: if.end:
; IS__CGSCC_NPM-NEXT: [[E_2:%.*]] = phi i32* [ undef, [[ENTRY:%.*]] ], [ null, [[FOR_COND1:%.*]] ]
-; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* null, align 1073741824
+; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* null, align 4294967296
; IS__CGSCC_NPM-NEXT: store i32 [[TMP0]], i32* [[P]], align 4
; IS__CGSCC_NPM-NEXT: br label [[FOR_COND1]]
; IS__CGSCC_NPM: exit:
diff --git a/llvm/test/Transforms/Attributor/IPConstantProp/pthreads.ll b/llvm/test/Transforms/Attributor/IPConstantProp/pthreads.ll
index 6dfb5c769dab..4414741a2062 100644
--- a/llvm/test/Transforms/Attributor/IPConstantProp/pthreads.ll
+++ b/llvm/test/Transforms/Attributor/IPConstantProp/pthreads.ll
@@ -39,10 +39,10 @@ define dso_local i32 @main() {
; IS__TUNIT____-NEXT: [[ALLOC1:%.*]] = alloca i8, align 8
; IS__TUNIT____-NEXT: [[ALLOC2:%.*]] = alloca i8, align 8
; IS__TUNIT____-NEXT: [[THREAD:%.*]] = alloca i64, align 8
-; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 1073741824 null, i8* (i8*)* noundef nonnull @foo, i8* noalias nocapture nofree readnone align 1073741824 undef)
-; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 1073741824 null, i8* (i8*)* noundef nonnull @bar, i8* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) undef)
-; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 1073741824 null, i8* (i8*)* noundef nonnull @baz, i8* noalias nocapture nofree noundef nonnull readnone align 8 dereferenceable(1) [[ALLOC1]])
-; IS__TUNIT____-NEXT: [[CALL3:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 1073741824 null, i8* (i8*)* noundef nonnull @buz, i8* noalias nofree noundef nonnull readnone align 8 dereferenceable(1) "no-capture-maybe-returned" [[ALLOC2]])
+; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @foo, i8* noalias nocapture nofree readnone align 4294967296 undef)
+; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @bar, i8* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) undef)
+; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @baz, i8* noalias nocapture nofree noundef nonnull readnone align 8 dereferenceable(1) [[ALLOC1]])
+; IS__TUNIT____-NEXT: [[CALL3:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @buz, i8* noalias nofree noundef nonnull readnone align 8 dereferenceable(1) "no-capture-maybe-returned" [[ALLOC2]])
; IS__TUNIT____-NEXT: ret i32 0
;
; IS__CGSCC____-LABEL: define {{[^@]+}}@main() {
@@ -50,10 +50,10 @@ define dso_local i32 @main() {
; IS__CGSCC____-NEXT: [[ALLOC1:%.*]] = alloca i8, align 8
; IS__CGSCC____-NEXT: [[ALLOC2:%.*]] = alloca i8, align 8
; IS__CGSCC____-NEXT: [[THREAD:%.*]] = alloca i64, align 8
-; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 1073741824 null, i8* (i8*)* noundef nonnull @foo, i8* noalias nocapture nofree noundef readnone align 1073741824 null)
-; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 1073741824 null, i8* (i8*)* noundef nonnull @bar, i8* noalias nocapture nofree noundef nonnull readnone align 8 dereferenceable(8) bitcast (i8** @GlobalVPtr to i8*))
-; IS__CGSCC____-NEXT: [[CALL2:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 1073741824 null, i8* (i8*)* noundef nonnull @baz, i8* noalias nocapture nofree noundef nonnull readnone align 8 dereferenceable(1) [[ALLOC1]])
-; IS__CGSCC____-NEXT: [[CALL3:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 1073741824 null, i8* (i8*)* noundef nonnull @buz, i8* noalias nofree noundef nonnull readnone align 8 dereferenceable(1) "no-capture-maybe-returned" [[ALLOC2]])
+; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @foo, i8* noalias nocapture nofree noundef readnone align 4294967296 null)
+; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @bar, i8* noalias nocapture nofree noundef nonnull readnone align 8 dereferenceable(8) bitcast (i8** @GlobalVPtr to i8*))
+; IS__CGSCC____-NEXT: [[CALL2:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @baz, i8* noalias nocapture nofree noundef nonnull readnone align 8 dereferenceable(1) [[ALLOC1]])
+; IS__CGSCC____-NEXT: [[CALL3:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @buz, i8* noalias nofree noundef nonnull readnone align 8 dereferenceable(1) "no-capture-maybe-returned" [[ALLOC2]])
; IS__CGSCC____-NEXT: ret i32 0
;
entry:
@@ -72,13 +72,13 @@ declare !callback !0 dso_local i32 @pthread_create(i64*, %union.pthread_attr_t*,
define internal i8* @foo(i8* %arg) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo
-; IS__TUNIT____-SAME: (i8* noalias nocapture nofree readnone align 1073741824 [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {
+; IS__TUNIT____-SAME: (i8* noalias nocapture nofree readnone align 4294967296 [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: ret i8* null
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo
-; IS__CGSCC____-SAME: (i8* noalias nocapture nofree readnone align 1073741824 [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {
+; IS__CGSCC____-SAME: (i8* noalias nocapture nofree readnone align 4294967296 [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i8* null
;
diff --git a/llvm/test/Transforms/Attributor/callbacks.ll b/llvm/test/Transforms/Attributor/callbacks.ll
index 7c1fe687a930..aed46afdb62b 100644
--- a/llvm/test/Transforms/Attributor/callbacks.ll
+++ b/llvm/test/Transforms/Attributor/callbacks.ll
@@ -25,7 +25,7 @@ define void @t0_caller(i32* %a) {
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__TUNIT_OPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__TUNIT_OPM-NEXT: store i32* [[B]], i32** [[C]], align 64
-; IS__TUNIT_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t0_callback_broker(i32* noalias nocapture noundef align 1073741824 null, i32* noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t0_callback_callee to void (i32*, i32*, ...)*), i32* align 256 [[A]], i64 undef, i32** nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
+; IS__TUNIT_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t0_callback_broker(i32* noalias nocapture noundef align 4294967296 null, i32* noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t0_callback_callee to void (i32*, i32*, ...)*), i32* align 256 [[A]], i64 undef, i32** nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__TUNIT_OPM-NEXT: ret void
;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@t0_caller
@@ -37,7 +37,7 @@ define void @t0_caller(i32* %a) {
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__TUNIT_NPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__TUNIT_NPM-NEXT: store i32* [[B]], i32** [[C]], align 64
-; IS__TUNIT_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t0_callback_broker(i32* noalias nocapture noundef align 1073741824 null, i32* noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t0_callback_callee to void (i32*, i32*, ...)*), i32* align 256 [[A]], i64 undef, i32** noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
+; IS__TUNIT_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t0_callback_broker(i32* noalias nocapture noundef align 4294967296 null, i32* noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t0_callback_callee to void (i32*, i32*, ...)*), i32* align 256 [[A]], i64 undef, i32** noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__TUNIT_NPM-NEXT: ret void
;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@t0_caller
@@ -49,7 +49,7 @@ define void @t0_caller(i32* %a) {
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__CGSCC_OPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__CGSCC_OPM-NEXT: store i32* [[B]], i32** [[C]], align 64
-; IS__CGSCC_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t0_callback_broker(i32* noalias nocapture noundef align 1073741824 null, i32* noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t0_callback_callee to void (i32*, i32*, ...)*), i32* align 256 [[A]], i64 noundef 99, i32** nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
+; IS__CGSCC_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t0_callback_broker(i32* noalias nocapture noundef align 4294967296 null, i32* noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t0_callback_callee to void (i32*, i32*, ...)*), i32* align 256 [[A]], i64 noundef 99, i32** nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@t0_caller
@@ -61,7 +61,7 @@ define void @t0_caller(i32* %a) {
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__CGSCC_NPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__CGSCC_NPM-NEXT: store i32* [[B]], i32** [[C]], align 64
-; IS__CGSCC_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t0_callback_broker(i32* noalias nocapture noundef align 1073741824 null, i32* noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t0_callback_callee to void (i32*, i32*, ...)*), i32* align 256 [[A]], i64 noundef 99, i32** noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
+; IS__CGSCC_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t0_callback_broker(i32* noalias nocapture noundef align 4294967296 null, i32* noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t0_callback_callee to void (i32*, i32*, ...)*), i32* align 256 [[A]], i64 noundef 99, i32** noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__CGSCC_NPM-NEXT: ret void
;
entry:
@@ -125,7 +125,7 @@ define void @t1_caller(i32* noalias %a) {
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__TUNIT_OPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__TUNIT_OPM-NEXT: store i32* [[B]], i32** [[C]], align 64
-; IS__TUNIT_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t1_callback_broker(i32* noalias nocapture noundef align 1073741824 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t1_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 undef, i32** nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
+; IS__TUNIT_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t1_callback_broker(i32* noalias nocapture noundef align 4294967296 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t1_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 undef, i32** nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__TUNIT_OPM-NEXT: ret void
;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@t1_caller
@@ -137,7 +137,7 @@ define void @t1_caller(i32* noalias %a) {
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__TUNIT_NPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__TUNIT_NPM-NEXT: store i32* [[B]], i32** [[C]], align 64
-; IS__TUNIT_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t1_callback_broker(i32* noalias nocapture noundef align 1073741824 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t1_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 undef, i32** noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
+; IS__TUNIT_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t1_callback_broker(i32* noalias nocapture noundef align 4294967296 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t1_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 undef, i32** noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__TUNIT_NPM-NEXT: ret void
;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@t1_caller
@@ -149,7 +149,7 @@ define void @t1_caller(i32* noalias %a) {
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__CGSCC_OPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__CGSCC_OPM-NEXT: store i32* [[B]], i32** [[C]], align 64
-; IS__CGSCC_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t1_callback_broker(i32* noalias nocapture noundef align 1073741824 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t1_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 noundef 99, i32** nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
+; IS__CGSCC_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t1_callback_broker(i32* noalias nocapture noundef align 4294967296 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t1_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 noundef 99, i32** nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@t1_caller
@@ -161,7 +161,7 @@ define void @t1_caller(i32* noalias %a) {
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__CGSCC_NPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__CGSCC_NPM-NEXT: store i32* [[B]], i32** [[C]], align 64
-; IS__CGSCC_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t1_callback_broker(i32* noalias nocapture noundef align 1073741824 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t1_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 noundef 99, i32** noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
+; IS__CGSCC_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t1_callback_broker(i32* noalias nocapture noundef align 4294967296 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t1_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 noundef 99, i32** noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__CGSCC_NPM-NEXT: ret void
;
entry:
@@ -225,7 +225,7 @@ define void @t2_caller(i32* noalias %a) {
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__TUNIT_OPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__TUNIT_OPM-NEXT: store i32* [[B]], i32** [[C]], align 64
-; IS__TUNIT_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t2_callback_broker(i32* noalias nocapture noundef align 1073741824 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t2_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 undef, i32** nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
+; IS__TUNIT_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t2_callback_broker(i32* noalias nocapture noundef align 4294967296 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t2_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 undef, i32** nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__TUNIT_OPM-NEXT: ret void
;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@t2_caller
@@ -237,7 +237,7 @@ define void @t2_caller(i32* noalias %a) {
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__TUNIT_NPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__TUNIT_NPM-NEXT: store i32* [[B]], i32** [[C]], align 64
-; IS__TUNIT_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t2_callback_broker(i32* noalias nocapture noundef align 1073741824 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t2_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 undef, i32** noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
+; IS__TUNIT_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t2_callback_broker(i32* noalias nocapture noundef align 4294967296 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t2_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 undef, i32** noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__TUNIT_NPM-NEXT: ret void
;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@t2_caller
@@ -249,7 +249,7 @@ define void @t2_caller(i32* noalias %a) {
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__CGSCC_OPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__CGSCC_OPM-NEXT: store i32* [[B]], i32** [[C]], align 64
-; IS__CGSCC_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t2_callback_broker(i32* noalias nocapture noundef align 1073741824 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t2_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 noundef 99, i32** nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
+; IS__CGSCC_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t2_callback_broker(i32* noalias nocapture noundef align 4294967296 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t2_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 noundef 99, i32** nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@t2_caller
@@ -261,7 +261,7 @@ define void @t2_caller(i32* noalias %a) {
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__CGSCC_NPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__CGSCC_NPM-NEXT: store i32* [[B]], i32** [[C]], align 64
-; IS__CGSCC_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t2_callback_broker(i32* noalias nocapture noundef align 1073741824 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t2_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 noundef 99, i32** noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
+; IS__CGSCC_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t2_callback_broker(i32* noalias nocapture noundef align 4294967296 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t2_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 noundef 99, i32** noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__CGSCC_NPM-NEXT: ret void
;
entry:
@@ -325,8 +325,8 @@ define void @t3_caller(i32* noalias %a) {
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__TUNIT_OPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__TUNIT_OPM-NEXT: store i32* [[B]], i32** [[C]], align 64
-; IS__TUNIT_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 1073741824 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 undef, i32** nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
-; IS__TUNIT_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 1073741824 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 undef, i32** nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
+; IS__TUNIT_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 4294967296 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 undef, i32** nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
+; IS__TUNIT_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 4294967296 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 undef, i32** nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__TUNIT_OPM-NEXT: ret void
;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@t3_caller
@@ -338,8 +338,8 @@ define void @t3_caller(i32* noalias %a) {
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__TUNIT_NPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__TUNIT_NPM-NEXT: store i32* [[B]], i32** [[C]], align 64
-; IS__TUNIT_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 1073741824 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 undef, i32** noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
-; IS__TUNIT_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 1073741824 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 undef, i32** noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
+; IS__TUNIT_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 4294967296 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 undef, i32** noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
+; IS__TUNIT_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 4294967296 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 undef, i32** noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__TUNIT_NPM-NEXT: ret void
;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@t3_caller
@@ -351,8 +351,8 @@ define void @t3_caller(i32* noalias %a) {
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__CGSCC_OPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__CGSCC_OPM-NEXT: store i32* [[B]], i32** [[C]], align 64
-; IS__CGSCC_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 1073741824 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 noundef 99, i32** nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
-; IS__CGSCC_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 1073741824 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 noundef 99, i32** nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
+; IS__CGSCC_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 4294967296 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 noundef 99, i32** nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
+; IS__CGSCC_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 4294967296 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 noundef 99, i32** nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@t3_caller
@@ -364,8 +364,8 @@ define void @t3_caller(i32* noalias %a) {
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__CGSCC_NPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__CGSCC_NPM-NEXT: store i32* [[B]], i32** [[C]], align 64
-; IS__CGSCC_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 1073741824 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 noundef 99, i32** noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
-; IS__CGSCC_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 1073741824 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 noundef 99, i32** noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
+; IS__CGSCC_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 4294967296 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 noundef 99, i32** noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
+; IS__CGSCC_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 4294967296 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 noundef 99, i32** noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__CGSCC_NPM-NEXT: ret void
;
entry:
diff --git a/llvm/test/Transforms/Attributor/liveness.ll b/llvm/test/Transforms/Attributor/liveness.ll
index 393000bacd53..fcb6530c6333 100644
--- a/llvm/test/Transforms/Attributor/liveness.ll
+++ b/llvm/test/Transforms/Attributor/liveness.ll
@@ -527,13 +527,13 @@ define void @ub(i32* %0) {
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@ub
; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readnone [[TMP0:%.*]]) #[[ATTR8:[0-9]+]] {
-; IS__TUNIT_NPM-NEXT: store i32 0, i32* undef, align 1073741824
+; IS__TUNIT_NPM-NEXT: store i32 0, i32* undef, align 4294967296
; IS__TUNIT_NPM-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@ub
; IS__CGSCC____-SAME: (i32* nocapture nofree readnone [[TMP0:%.*]]) #[[ATTR10:[0-9]+]] {
-; IS__CGSCC____-NEXT: store i32 0, i32* undef, align 1073741824
+; IS__CGSCC____-NEXT: store i32 0, i32* undef, align 4294967296
; IS__CGSCC____-NEXT: ret void
;
%poison = sub nuw i32 0, 1 ; Results in a poison value.
diff --git a/llvm/test/Transforms/Attributor/memory_locations.ll b/llvm/test/Transforms/Attributor/memory_locations.ll
index b9a97aceb60e..7e9e3d2a33ff 100644
--- a/llvm/test/Transforms/Attributor/memory_locations.ll
+++ b/llvm/test/Transforms/Attributor/memory_locations.ll
@@ -397,7 +397,7 @@ define void @callerC2() {
}
define void @callerD1() {
; CHECK-LABEL: define {{[^@]+}}@callerD1() {
-; CHECK-NEXT: [[UNKNOWN:%.*]] = call i8* @argmem_only(i8* noalias nocapture noundef align 1073741824 null)
+; CHECK-NEXT: [[UNKNOWN:%.*]] = call i8* @argmem_only(i8* noalias nocapture noundef align 4294967296 null)
; CHECK-NEXT: store i8 0, i8* [[UNKNOWN]], align 1
; CHECK-NEXT: ret void
;
@@ -407,7 +407,7 @@ define void @callerD1() {
}
define void @callerD2() {
; CHECK-LABEL: define {{[^@]+}}@callerD2() {
-; CHECK-NEXT: [[UNKNOWN:%.*]] = call i8* @inaccesible_argmem_only_decl(i8* noalias nocapture noundef align 1073741824 null)
+; CHECK-NEXT: [[UNKNOWN:%.*]] = call i8* @inaccesible_argmem_only_decl(i8* noalias nocapture noundef align 4294967296 null)
; CHECK-NEXT: store i8 0, i8* [[UNKNOWN]], align 1
; CHECK-NEXT: ret void
;
diff --git a/llvm/test/Transforms/Attributor/noalias.ll b/llvm/test/Transforms/Attributor/noalias.ll
index 820f68185a39..ef2c404595a3 100644
--- a/llvm/test/Transforms/Attributor/noalias.ll
+++ b/llvm/test/Transforms/Attributor/noalias.ll
@@ -265,7 +265,7 @@ define i8* @test8(i32* %0) nounwind uwtable {
declare void @use_i8(i8* nocapture)
define internal void @test9a(i8* %a, i8* %b) {
; CHECK-LABEL: define {{[^@]+}}@test9a() {
-; CHECK-NEXT: call void @use_i8(i8* noalias nocapture noundef align 1073741824 null)
+; CHECK-NEXT: call void @use_i8(i8* noalias nocapture noundef align 4294967296 null)
; CHECK-NEXT: ret void
;
call void @use_i8(i8* null)
diff --git a/llvm/test/Transforms/Attributor/nocapture-1.ll b/llvm/test/Transforms/Attributor/nocapture-1.ll
index 544f3bde7c72..ac6545a69f92 100644
--- a/llvm/test/Transforms/Attributor/nocapture-1.ll
+++ b/llvm/test/Transforms/Attributor/nocapture-1.ll
@@ -478,7 +478,7 @@ define i8* @test4_2(i8* %x4_2, i8* %y4_2, i8* %z4_2, i1 %c) {
; IS________OPM-SAME: (i8* nocapture nofree readnone [[X4_2:%.*]], i8* nofree readnone returned "no-capture-maybe-returned" [[Y4_2:%.*]], i8* nocapture nofree readnone [[Z4_2:%.*]], i1 [[C:%.*]]) #[[ATTR7]] {
; IS________OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS________OPM: t:
-; IS________OPM-NEXT: call void @test4_1(i8* noalias nocapture nofree noundef readnone align 1073741824 null, i1 [[C]]) #[[ATTR7]]
+; IS________OPM-NEXT: call void @test4_1(i8* noalias nocapture nofree noundef readnone align 4294967296 null, i1 [[C]]) #[[ATTR7]]
; IS________OPM-NEXT: store i32* null, i32** @g, align 8
; IS________OPM-NEXT: br label [[F]]
; IS________OPM: f:
@@ -489,7 +489,7 @@ define i8* @test4_2(i8* %x4_2, i8* %y4_2, i8* %z4_2, i1 %c) {
; IS________NPM-SAME: (i8* nocapture nofree readnone [[X4_2:%.*]], i8* nofree readnone returned "no-capture-maybe-returned" [[Y4_2:%.*]], i8* nocapture nofree readnone [[Z4_2:%.*]], i1 [[C:%.*]]) #[[ATTR7]] {
; IS________NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS________NPM: t:
-; IS________NPM-NEXT: call void @test4_1(i8* noalias nocapture nofree noundef readnone align 1073741824 null, i1 noundef [[C]]) #[[ATTR7]]
+; IS________NPM-NEXT: call void @test4_1(i8* noalias nocapture nofree noundef readnone align 4294967296 null, i1 noundef [[C]]) #[[ATTR7]]
; IS________NPM-NEXT: store i32* null, i32** @g, align 8
; IS________NPM-NEXT: br label [[F]]
; IS________NPM: f:
@@ -807,7 +807,7 @@ declare void @unknown(i8*)
define void @test_callsite() {
; CHECK-LABEL: define {{[^@]+}}@test_callsite() {
; CHECK-NEXT: entry:
-; CHECK-NEXT: call void @unknown(i8* noalias nocapture noundef align 1073741824 null)
+; CHECK-NEXT: call void @unknown(i8* noalias nocapture noundef align 4294967296 null)
; CHECK-NEXT: ret void
;
entry:
diff --git a/llvm/test/Transforms/Attributor/noundef.ll b/llvm/test/Transforms/Attributor/noundef.ll
index efddca92b4a2..a177674ca36c 100644
--- a/llvm/test/Transforms/Attributor/noundef.ll
+++ b/llvm/test/Transforms/Attributor/noundef.ll
@@ -41,7 +41,7 @@ define void @caller1() {
define internal void @argument_dead_callback_callee(i8* %c) {
; CHECK-LABEL: define {{[^@]+}}@argument_dead_callback_callee
-; CHECK-SAME: (i8* noalias nocapture nofree readnone align 1073741824 [[C:%.*]]) {
+; CHECK-SAME: (i8* noalias nocapture nofree readnone align 4294967296 [[C:%.*]]) {
; CHECK-NEXT: call void @unknown()
; CHECK-NEXT: ret void
;
@@ -51,11 +51,11 @@ define internal void @argument_dead_callback_callee(i8* %c) {
define void @callback_caller() {
; IS__TUNIT____-LABEL: define {{[^@]+}}@callback_caller() {
-; IS__TUNIT____-NEXT: call void @callback_broker(void (i8*)* noundef @argument_dead_callback_callee, i8* noalias nocapture nofree readnone align 1073741824 undef)
+; IS__TUNIT____-NEXT: call void @callback_broker(void (i8*)* noundef @argument_dead_callback_callee, i8* noalias nocapture nofree readnone align 4294967296 undef)
; IS__TUNIT____-NEXT: ret void
;
; IS__CGSCC____-LABEL: define {{[^@]+}}@callback_caller() {
-; IS__CGSCC____-NEXT: call void @callback_broker(void (i8*)* noundef @argument_dead_callback_callee, i8* noalias nocapture nofree noundef readnone align 1073741824 null)
+; IS__CGSCC____-NEXT: call void @callback_broker(void (i8*)* noundef @argument_dead_callback_callee, i8* noalias nocapture nofree noundef readnone align 4294967296 null)
; IS__CGSCC____-NEXT: ret void
;
call void @callback_broker(void (i8*)* @argument_dead_callback_callee, i8* null)
diff --git a/llvm/test/Transforms/Attributor/undefined_behavior.ll b/llvm/test/Transforms/Attributor/undefined_behavior.ll
index 71063d4f5f16..368b1f03ceb5 100644
--- a/llvm/test/Transforms/Attributor/undefined_behavior.ll
+++ b/llvm/test/Transforms/Attributor/undefined_behavior.ll
@@ -134,13 +134,13 @@ define void @store_wholly_unreachable_volatile() {
; IS__TUNIT____: Function Attrs: nofree nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@store_wholly_unreachable_volatile
; IS__TUNIT____-SAME: () #[[ATTR2:[0-9]+]] {
-; IS__TUNIT____-NEXT: store volatile i32 5, i32* null, align 1073741824
+; IS__TUNIT____-NEXT: store volatile i32 5, i32* null, align 4294967296
; IS__TUNIT____-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@store_wholly_unreachable_volatile
; IS__CGSCC____-SAME: () #[[ATTR2:[0-9]+]] {
-; IS__CGSCC____-NEXT: store volatile i32 5, i32* null, align 1073741824
+; IS__CGSCC____-NEXT: store volatile i32 5, i32* null, align 4294967296
; IS__CGSCC____-NEXT: ret void
;
store volatile i32 5, i32* null
@@ -178,13 +178,13 @@ define void @store_null_pointer_is_defined() null_pointer_is_valid {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind null_pointer_is_valid willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@store_null_pointer_is_defined
; IS__TUNIT____-SAME: () #[[ATTR3:[0-9]+]] {
-; IS__TUNIT____-NEXT: store i32 5, i32* null, align 1073741824
+; IS__TUNIT____-NEXT: store i32 5, i32* null, align 4294967296
; IS__TUNIT____-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@store_null_pointer_is_defined
; IS__CGSCC____-SAME: () #[[ATTR3:[0-9]+]] {
-; IS__CGSCC____-NEXT: store i32 5, i32* null, align 1073741824
+; IS__CGSCC____-NEXT: store i32 5, i32* null, align 4294967296
; IS__CGSCC____-NEXT: ret void
;
store i32 5, i32* null
@@ -832,7 +832,7 @@ define void @arg_nonnull_violation3_1(i1 %c) {
; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: t:
; IS__TUNIT____-NEXT: call void @arg_nonnull_12(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]]) #[[ATTR7:[0-9]+]]
-; IS__TUNIT____-NEXT: call void @arg_nonnull_12(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* noalias nocapture nofree noundef writeonly align 1073741824 null) #[[ATTR7]]
+; IS__TUNIT____-NEXT: call void @arg_nonnull_12(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* noalias nocapture nofree noundef writeonly align 4294967296 null) #[[ATTR7]]
; IS__TUNIT____-NEXT: unreachable
; IS__TUNIT____: f:
; IS__TUNIT____-NEXT: unreachable
@@ -846,7 +846,7 @@ define void @arg_nonnull_violation3_1(i1 %c) {
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: call void @arg_nonnull_12(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]]) #[[ATTR7:[0-9]+]]
-; IS__CGSCC____-NEXT: call void @arg_nonnull_12(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* noalias nocapture nofree noundef writeonly align 1073741824 null) #[[ATTR7]]
+; IS__CGSCC____-NEXT: call void @arg_nonnull_12(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* noalias nocapture nofree noundef writeonly align 4294967296 null) #[[ATTR7]]
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: unreachable
@@ -879,7 +879,7 @@ define void @arg_nonnull_violation3_2(i1 %c) {
; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: t:
; IS__TUNIT____-NEXT: call void @arg_nonnull_12_noundef_2(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]]) #[[ATTR7]]
-; IS__TUNIT____-NEXT: call void @arg_nonnull_12_noundef_2(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* noalias nocapture nofree noundef writeonly align 1073741824 null) #[[ATTR7]]
+; IS__TUNIT____-NEXT: call void @arg_nonnull_12_noundef_2(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* noalias nocapture nofree noundef writeonly align 4294967296 null) #[[ATTR7]]
; IS__TUNIT____-NEXT: unreachable
; IS__TUNIT____: f:
; IS__TUNIT____-NEXT: unreachable
@@ -893,7 +893,7 @@ define void @arg_nonnull_violation3_2(i1 %c) {
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: call void @arg_nonnull_12_noundef_2(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]]) #[[ATTR7]]
-; IS__CGSCC____-NEXT: call void @arg_nonnull_12_noundef_2(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* noalias nocapture nofree noundef writeonly align 1073741824 null) #[[ATTR7]]
+; IS__CGSCC____-NEXT: call void @arg_nonnull_12_noundef_2(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* noalias nocapture nofree noundef writeonly align 4294967296 null) #[[ATTR7]]
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: unreachable
diff --git a/llvm/test/Transforms/Attributor/value-simplify.ll b/llvm/test/Transforms/Attributor/value-simplify.ll
index b674563e65fb..78cb210aebe3 100644
--- a/llvm/test/Transforms/Attributor/value-simplify.ll
+++ b/llvm/test/Transforms/Attributor/value-simplify.ll
@@ -449,12 +449,12 @@ define i32* @complicated_args_inalloca(i32* %arg) {
define internal i32* @test_preallocated(i32* preallocated(i32) %a) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_preallocated
-; IS__TUNIT____-SAME: (i32* noalias nofree noundef nonnull returned writeonly preallocated(i32) align 1073741824 dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR1]] {
+; IS__TUNIT____-SAME: (i32* noalias nofree noundef nonnull returned writeonly preallocated(i32) align 4294967296 dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i32* [[A]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_preallocated
-; IS__CGSCC____-SAME: (i32* noalias nofree noundef nonnull returned writeonly preallocated(i32) align 1073741824 dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR1]] {
+; IS__CGSCC____-SAME: (i32* noalias nofree noundef nonnull returned writeonly preallocated(i32) align 4294967296 dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i32* [[A]]
;
ret i32* %a
@@ -464,14 +464,14 @@ define i32* @complicated_args_preallocated() {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@complicated_args_preallocated
; IS__TUNIT_OPM-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1) #[[ATTR5:[0-9]+]]
-; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noundef nonnull align 1073741824 dereferenceable(4) i32* @test_preallocated(i32* noalias nocapture nofree noundef writeonly preallocated(i32) align 1073741824 null) #[[ATTR1]] [ "preallocated"(token [[C]]) ]
+; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noundef nonnull align 4294967296 dereferenceable(4) i32* @test_preallocated(i32* noalias nocapture nofree noundef writeonly preallocated(i32) align 4294967296 null) #[[ATTR1]] [ "preallocated"(token [[C]]) ]
; IS__TUNIT_OPM-NEXT: ret i32* [[CALL]]
;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@complicated_args_preallocated
; IS__TUNIT_NPM-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1) #[[ATTR4:[0-9]+]]
-; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call noundef nonnull align 1073741824 dereferenceable(4) i32* @test_preallocated(i32* noalias nocapture nofree noundef writeonly preallocated(i32) align 1073741824 null) #[[ATTR1]] [ "preallocated"(token [[C]]) ]
+; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call noundef nonnull align 4294967296 dereferenceable(4) i32* @test_preallocated(i32* noalias nocapture nofree noundef writeonly preallocated(i32) align 4294967296 null) #[[ATTR1]] [ "preallocated"(token [[C]]) ]
; IS__TUNIT_NPM-NEXT: ret i32* [[CALL]]
;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind willreturn
@@ -495,13 +495,13 @@ define internal void @test_sret(%struct.X* sret(%struct.X) %a, %struct.X** %b) {
;
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_sret
-; IS__TUNIT____-SAME: (%struct.X* noalias nofree noundef nonnull writeonly sret([[STRUCT_X:%.*]]) align 1073741824 dereferenceable(8) [[A:%.*]], %struct.X** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[B:%.*]]) #[[ATTR2:[0-9]+]] {
+; IS__TUNIT____-SAME: (%struct.X* noalias nofree noundef nonnull writeonly sret([[STRUCT_X:%.*]]) align 4294967296 dereferenceable(8) [[A:%.*]], %struct.X** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[B:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__TUNIT____-NEXT: store %struct.X* [[A]], %struct.X** [[B]], align 8
; IS__TUNIT____-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_sret
-; IS__CGSCC____-SAME: (%struct.X* noalias nofree noundef nonnull writeonly sret([[STRUCT_X:%.*]]) align 1073741824 dereferenceable(8) [[A:%.*]], %struct.X** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[B:%.*]]) #[[ATTR2:[0-9]+]] {
+; IS__CGSCC____-SAME: (%struct.X* noalias nofree noundef nonnull writeonly sret([[STRUCT_X:%.*]]) align 4294967296 dereferenceable(8) [[A:%.*]], %struct.X** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[B:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__CGSCC____-NEXT: store %struct.X* [[A]], %struct.X** [[B]], align 8
; IS__CGSCC____-NEXT: ret void
;
@@ -515,7 +515,7 @@ define void @complicated_args_sret(%struct.X** %b) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@complicated_args_sret
; IS__TUNIT____-SAME: (%struct.X** nocapture nofree writeonly [[B:%.*]]) #[[ATTR2]] {
-; IS__TUNIT____-NEXT: call void @test_sret(%struct.X* noalias nocapture nofree noundef writeonly sret([[STRUCT_X:%.*]]) align 1073741824 null, %struct.X** nocapture nofree writeonly align 8 [[B]]) #[[ATTR3:[0-9]+]]
+; IS__TUNIT____-NEXT: call void @test_sret(%struct.X* noalias nocapture nofree noundef writeonly sret([[STRUCT_X:%.*]]) align 4294967296 null, %struct.X** nocapture nofree writeonly align 8 [[B]]) #[[ATTR3:[0-9]+]]
; IS__TUNIT____-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
@@ -530,7 +530,7 @@ define void @complicated_args_sret(%struct.X** %b) {
define internal %struct.X* @test_nest(%struct.X* nest %a) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_nest
-; IS__CGSCC____-SAME: (%struct.X* nest noalias nocapture nofree readnone align 1073741824 [[A:%.*]]) #[[ATTR1]] {
+; IS__CGSCC____-SAME: (%struct.X* nest noalias nocapture nofree readnone align 4294967296 [[A:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret %struct.X* undef
;
ret %struct.X* %a
diff --git a/llvm/test/Transforms/GVN/PRE/2017-06-28-pre-load-dbgloc.ll b/llvm/test/Transforms/GVN/PRE/2017-06-28-pre-load-dbgloc.ll
index 0a9c758b8e2e..c81d5b3608e7 100644
--- a/llvm/test/Transforms/GVN/PRE/2017-06-28-pre-load-dbgloc.ll
+++ b/llvm/test/Transforms/GVN/PRE/2017-06-28-pre-load-dbgloc.ll
@@ -38,7 +38,7 @@ entry:
; ALL: br i1 %tobool, label %entry.cond.end_crit_edge, label %cond.false, !dbg [[LOC_15_6:![0-9]+]]
; ALL: entry.cond.end_crit_edge:
; GVN: %.pre = load %struct.node*, %struct.node** null, align 8, !dbg [[LOC_16_13:![0-9]+]]
-; INSTCOMBINE:store %struct.node* poison, %struct.node** null, align 1073741824, !dbg [[LOC_16_13:![0-9]+]]
+; INSTCOMBINE:store %struct.node* poison, %struct.node** null, align 4294967296, !dbg [[LOC_16_13:![0-9]+]]
cond.false:
%0 = bitcast %struct.desc* %desc to i8***, !dbg !11
diff --git a/llvm/test/Transforms/InstCombine/atomic.ll b/llvm/test/Transforms/InstCombine/atomic.ll
index de1bc6707f7e..c87a01a09eac 100644
--- a/llvm/test/Transforms/InstCombine/atomic.ll
+++ b/llvm/test/Transforms/InstCombine/atomic.ll
@@ -119,7 +119,7 @@ define i32 @test8(i32* %p) {
; ordering imposed.
define i32 @test9() {
; CHECK-LABEL: @test9(
-; CHECK-NEXT: store i32 poison, i32* null, align 1073741824
+; CHECK-NEXT: store i32 poison, i32* null, align 4294967296
; CHECK-NEXT: ret i32 poison
;
%x = load atomic i32, i32* null unordered, align 4
@@ -128,7 +128,7 @@ define i32 @test9() {
define i32 @test9_no_null_opt() #0 {
; CHECK-LABEL: @test9_no_null_opt(
-; CHECK-NEXT: [[X:%.*]] = load atomic i32, i32* null unordered, align 1073741824
+; CHECK-NEXT: [[X:%.*]] = load atomic i32, i32* null unordered, align 4294967296
; CHECK-NEXT: ret i32 [[X]]
;
%x = load atomic i32, i32* null unordered, align 4
@@ -138,7 +138,7 @@ define i32 @test9_no_null_opt() #0 {
; FIXME: Could also fold
define i32 @test10() {
; CHECK-LABEL: @test10(
-; CHECK-NEXT: [[X:%.*]] = load atomic i32, i32* null monotonic, align 1073741824
+; CHECK-NEXT: [[X:%.*]] = load atomic i32, i32* null monotonic, align 4294967296
; CHECK-NEXT: ret i32 [[X]]
;
%x = load atomic i32, i32* null monotonic, align 4
@@ -147,7 +147,7 @@ define i32 @test10() {
define i32 @test10_no_null_opt() #0 {
; CHECK-LABEL: @test10_no_null_opt(
-; CHECK-NEXT: [[X:%.*]] = load atomic i32, i32* null monotonic, align 1073741824
+; CHECK-NEXT: [[X:%.*]] = load atomic i32, i32* null monotonic, align 4294967296
; CHECK-NEXT: ret i32 [[X]]
;
%x = load atomic i32, i32* null monotonic, align 4
@@ -157,7 +157,7 @@ define i32 @test10_no_null_opt() #0 {
; Would this be legal to fold? Probably?
define i32 @test11() {
; CHECK-LABEL: @test11(
-; CHECK-NEXT: [[X:%.*]] = load atomic i32, i32* null seq_cst, align 1073741824
+; CHECK-NEXT: [[X:%.*]] = load atomic i32, i32* null seq_cst, align 4294967296
; CHECK-NEXT: ret i32 [[X]]
;
%x = load atomic i32, i32* null seq_cst, align 4
@@ -166,7 +166,7 @@ define i32 @test11() {
define i32 @test11_no_null_opt() #0 {
; CHECK-LABEL: @test11_no_null_opt(
-; CHECK-NEXT: [[X:%.*]] = load atomic i32, i32* null seq_cst, align 1073741824
+; CHECK-NEXT: [[X:%.*]] = load atomic i32, i32* null seq_cst, align 4294967296
; CHECK-NEXT: ret i32 [[X]]
;
%x = load atomic i32, i32* null seq_cst, align 4
@@ -177,7 +177,7 @@ define i32 @test11_no_null_opt() #0 {
; ordering imposed.
define i32 @test12() {
; CHECK-LABEL: @test12(
-; CHECK-NEXT: store atomic i32 poison, i32* null unordered, align 1073741824
+; CHECK-NEXT: store atomic i32 poison, i32* null unordered, align 4294967296
; CHECK-NEXT: ret i32 0
;
store atomic i32 0, i32* null unordered, align 4
@@ -186,7 +186,7 @@ define i32 @test12() {
define i32 @test12_no_null_opt() #0 {
; CHECK-LABEL: @test12_no_null_opt(
-; CHECK-NEXT: store atomic i32 0, i32* null unordered, align 1073741824
+; CHECK-NEXT: store atomic i32 0, i32* null unordered, align 4294967296
; CHECK-NEXT: ret i32 0
;
store atomic i32 0, i32* null unordered, align 4
@@ -196,7 +196,7 @@ define i32 @test12_no_null_opt() #0 {
; FIXME: Could also fold
define i32 @test13() {
; CHECK-LABEL: @test13(
-; CHECK-NEXT: store atomic i32 0, i32* null monotonic, align 1073741824
+; CHECK-NEXT: store atomic i32 0, i32* null monotonic, align 4294967296
; CHECK-NEXT: ret i32 0
;
store atomic i32 0, i32* null monotonic, align 4
@@ -205,7 +205,7 @@ define i32 @test13() {
define i32 @test13_no_null_opt() #0 {
; CHECK-LABEL: @test13_no_null_opt(
-; CHECK-NEXT: store atomic i32 0, i32* null monotonic, align 1073741824
+; CHECK-NEXT: store atomic i32 0, i32* null monotonic, align 4294967296
; CHECK-NEXT: ret i32 0
;
store atomic i32 0, i32* null monotonic, align 4
@@ -215,7 +215,7 @@ define i32 @test13_no_null_opt() #0 {
; Would this be legal to fold? Probably?
define i32 @test14() {
; CHECK-LABEL: @test14(
-; CHECK-NEXT: store atomic i32 0, i32* null seq_cst, align 1073741824
+; CHECK-NEXT: store atomic i32 0, i32* null seq_cst, align 4294967296
; CHECK-NEXT: ret i32 0
;
store atomic i32 0, i32* null seq_cst, align 4
@@ -224,7 +224,7 @@ define i32 @test14() {
define i32 @test14_no_null_opt() #0 {
; CHECK-LABEL: @test14_no_null_opt(
-; CHECK-NEXT: store atomic i32 0, i32* null seq_cst, align 1073741824
+; CHECK-NEXT: store atomic i32 0, i32* null seq_cst, align 4294967296
; CHECK-NEXT: ret i32 0
;
store atomic i32 0, i32* null seq_cst, align 4
diff --git a/llvm/test/Transforms/InstCombine/getelementptr.ll b/llvm/test/Transforms/InstCombine/getelementptr.ll
index a48c99f24a5d..faa9bedc6ae3 100644
--- a/llvm/test/Transforms/InstCombine/getelementptr.ll
+++ b/llvm/test/Transforms/InstCombine/getelementptr.ll
@@ -495,7 +495,7 @@ define i1 @test23() {
define void @test25() {
; CHECK-LABEL: @test25(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i64 poison, i64* null, align 1073741824
+; CHECK-NEXT: store i64 poison, i64* null, align 4294967296
; CHECK-NEXT: tail call void @foo25(i32 0, i64 poison)
; CHECK-NEXT: unreachable
;
@@ -613,7 +613,7 @@ declare i32 @printf(i8*, ...)
define i32 @test29(i8* %start, i32 %X) nounwind {
; CHECK-LABEL: @test29(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i64 poison, i64* null, align 1073741824
+; CHECK-NEXT: store i64 poison, i64* null, align 4294967296
; CHECK-NEXT: br i1 poison, label [[IF_THEN216:%.*]], label [[IF_END363:%.*]]
; CHECK: if.then216:
; CHECK-NEXT: ret i32 1
diff --git a/llvm/test/Transforms/InstCombine/load.ll b/llvm/test/Transforms/InstCombine/load.ll
index 8826a212e065..2a63f83177ca 100644
--- a/llvm/test/Transforms/InstCombine/load.ll
+++ b/llvm/test/Transforms/InstCombine/load.ll
@@ -59,7 +59,7 @@ define i32 @test5(i1 %C) {
define i32 @load_gep_null_inbounds(i64 %X) {
; CHECK-LABEL: @load_gep_null_inbounds(
-; CHECK-NEXT: store i32 poison, i32* null, align 1073741824
+; CHECK-NEXT: store i32 poison, i32* null, align 4294967296
; CHECK-NEXT: ret i32 poison
;
%V = getelementptr inbounds i32, i32* null, i64 %X
@@ -69,7 +69,7 @@ define i32 @load_gep_null_inbounds(i64 %X) {
define i32 @load_gep_null_not_inbounds(i64 %X) {
; CHECK-LABEL: @load_gep_null_not_inbounds(
-; CHECK-NEXT: store i32 poison, i32* null, align 1073741824
+; CHECK-NEXT: store i32 poison, i32* null, align 4294967296
; CHECK-NEXT: ret i32 poison
;
%V = getelementptr i32, i32* null, i64 %X
diff --git a/llvm/test/Transforms/InstCombine/mempcpy.ll b/llvm/test/Transforms/InstCombine/mempcpy.ll
index 713f70670960..7f53f5cecc2c 100644
--- a/llvm/test/Transforms/InstCombine/mempcpy.ll
+++ b/llvm/test/Transforms/InstCombine/mempcpy.ll
@@ -57,7 +57,7 @@ define i8* @memcpy_big_const_n(i8* %d, i8* nocapture readonly %s) {
define i32 @PR48810() {
; CHECK-LABEL: @PR48810(
-; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 undef, i8* align 1073741824 null, i64 undef, i1 false)
+; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 undef, i8* align 4294967296 null, i64 undef, i1 false)
; CHECK-NEXT: ret i32 undef
;
%r = call dereferenceable(1) i8* @mempcpy(i8* undef, i8* null, i64 undef)
diff --git a/llvm/test/Transforms/InstCombine/pr44245.ll b/llvm/test/Transforms/InstCombine/pr44245.ll
index 69b132b01b2c..d446cbf8b835 100644
--- a/llvm/test/Transforms/InstCombine/pr44245.ll
+++ b/llvm/test/Transforms/InstCombine/pr44245.ll
@@ -159,7 +159,7 @@ define void @test_2(i1 %c) local_unnamed_addr {
; CHECK: cond.true133:
; CHECK-NEXT: br label [[COND_END144:%.*]]
; CHECK: cond.false138:
-; CHECK-NEXT: store %type_2* poison, %type_2** null, align 1073741824
+; CHECK-NEXT: store %type_2* poison, %type_2** null, align 4294967296
; CHECK-NEXT: br label [[COND_END144]]
; CHECK: cond.end144:
; CHECK-NEXT: br label [[WHILE_COND]]
diff --git a/llvm/test/Transforms/InstCombine/store.ll b/llvm/test/Transforms/InstCombine/store.ll
index 8a28a0f38f60..35a96d3112ac 100644
--- a/llvm/test/Transforms/InstCombine/store.ll
+++ b/llvm/test/Transforms/InstCombine/store.ll
@@ -4,7 +4,7 @@
define void @test1(i32* %P) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: store i32 123, i32* undef, align 4
-; CHECK-NEXT: store i32 poison, i32* null, align 1073741824
+; CHECK-NEXT: store i32 poison, i32* null, align 4294967296
; CHECK-NEXT: ret void
;
store i32 undef, i32* %P
diff --git a/llvm/test/Transforms/OpenMP/parallel_level_fold.ll b/llvm/test/Transforms/OpenMP/parallel_level_fold.ll
index 1b3dc9b754ba..eb639a0c839e 100644
--- a/llvm/test/Transforms/OpenMP/parallel_level_fold.ll
+++ b/llvm/test/Transforms/OpenMP/parallel_level_fold.ll
@@ -49,9 +49,9 @@ define weak void @spmd() {
define weak void @parallel() {
; CHECK-LABEL: define {{[^@]+}}@parallel() {
-; CHECK-NEXT: [[I:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* align 1073741824 null, i8 2, i1 false, i1 false)
+; CHECK-NEXT: [[I:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* align 4294967296 null, i8 2, i1 false, i1 false)
; CHECK-NEXT: call void @spmd_helper()
-; CHECK-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noalias noundef align 1073741824 null, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef 0, i8* noalias noundef align 1073741824 null, i8* noalias noundef align 1073741824 null, i8** noalias noundef align 1073741824 null, i64 noundef 0)
+; CHECK-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noalias noundef align 4294967296 null, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef 0, i8* noalias noundef align 4294967296 null, i8* noalias noundef align 4294967296 null, i8** noalias noundef align 4294967296 null, i64 noundef 0)
; CHECK-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* null, i8 2, i1 false)
; CHECK-NEXT: ret void
;
@@ -108,7 +108,7 @@ define internal void @spmd_helper() {
define internal void @__kmpc_parallel_51(%struct.ident_t*, i32, i32, i32, i32, i8*, i8*, i8**, i64) {
; CHECK-LABEL: define {{[^@]+}}@__kmpc_parallel_51
-; CHECK-SAME: (%struct.ident_t* noalias nocapture nofree readnone align 1073741824 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], i32 [[TMP3:%.*]], i32 [[TMP4:%.*]], i8* noalias nocapture nofree readnone align 1073741824 [[TMP5:%.*]], i8* noalias nocapture nofree readnone align 1073741824 [[TMP6:%.*]], i8** noalias nocapture nofree readnone align 1073741824 [[TMP7:%.*]], i64 [[TMP8:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-SAME: (%struct.ident_t* noalias nocapture nofree readnone align 4294967296 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], i32 [[TMP3:%.*]], i32 [[TMP4:%.*]], i8* noalias nocapture nofree readnone align 4294967296 [[TMP5:%.*]], i8* noalias nocapture nofree readnone align 4294967296 [[TMP6:%.*]], i8** noalias nocapture nofree readnone align 4294967296 [[TMP7:%.*]], i64 [[TMP8:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: call void @parallel_helper()
; CHECK-NEXT: ret void
;
diff --git a/llvm/test/Verifier/align-md.ll b/llvm/test/Verifier/align-md.ll
index 9c628f32c2ae..8ef3fe44120d 100644
--- a/llvm/test/Verifier/align-md.ll
+++ b/llvm/test/Verifier/align-md.ll
@@ -52,7 +52,7 @@ entry:
define i8* @f7(i8** %x) {
entry:
- %y = load i8*, i8** %x, !align !{i64 2147483648}
+ %y = load i8*, i8** %x, !align !{i64 8589934592}
ret i8* %y
}
; CHECK: alignment is larger that implementation defined limit
diff --git a/llvm/unittests/IR/ValueTest.cpp b/llvm/unittests/IR/ValueTest.cpp
index 5bc6c91c29ed..8a0fba836dcb 100644
--- a/llvm/unittests/IR/ValueTest.cpp
+++ b/llvm/unittests/IR/ValueTest.cpp
@@ -61,9 +61,9 @@ TEST(GlobalTest, CreateAddressSpace) {
GlobalVariable::NotThreadLocal,
1);
- EXPECT_TRUE(Value::MaximumAlignment == 1073741824U);
- Dummy0->setAlignment(Align(1073741824));
- EXPECT_EQ(Dummy0->getAlignment(), 1073741824U);
+ EXPECT_TRUE(Value::MaximumAlignment == 4294967296ULL);
+ Dummy0->setAlignment(Align(4294967296ULL));
+ EXPECT_EQ(Dummy0->getAlignment(), 4294967296ULL);
// Make sure the address space isn't dropped when returning this.
Constant *Dummy1 = M->getOrInsertGlobal("dummy", Int32Ty);
@@ -101,7 +101,7 @@ TEST(GlobalTest, AlignDeath) {
Constant::getAllOnesValue(Int32Ty), "var", nullptr,
GlobalVariable::NotThreadLocal, 1);
- EXPECT_DEATH(Var->setAlignment(Align(2147483648U)),
+ EXPECT_DEATH(Var->setAlignment(Align(8589934592ULL)),
"Alignment is greater than MaximumAlignment");
}
#endif
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