[PATCH] D103136: [AVR] Add support for the tinyAVR 0-series and tinyAVR 1-seriesø

Ben Shi via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Tue Sep 7 19:37:10 PDT 2021


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGb0d4d969e22e: [AVR] Add support for the tinyAVR 0-series and tinyAVR 1-series (authored by justinlatimer, committed by benshi001).

Changed prior to commit:
  https://reviews.llvm.org/D103136?vs=371176&id=371237#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D103136/new/

https://reviews.llvm.org/D103136

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/test/Misc/target-invalid-cpu-note.c
  llvm/lib/Target/AVR/AVRDevices.td


Index: llvm/lib/Target/AVR/AVRDevices.td
===================================================================
--- llvm/lib/Target/AVR/AVRDevices.td
+++ llvm/lib/Target/AVR/AVRDevices.td
@@ -498,3 +498,28 @@
 def : Device<"attiny40", FamilyTiny, ELFArchTiny>;
 def : Device<"attiny102", FamilyTiny, ELFArchTiny>;
 def : Device<"attiny104", FamilyTiny, ELFArchTiny>;
+def : Device<"attiny202", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny402", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny204", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny404", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny804", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny1604", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny406", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny806", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny1606", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny807", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny1607", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny212", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny412", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny214", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny414", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny814", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny1614", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny416", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny816", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny1616", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny3216", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny417", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny817", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny1617", FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny3217", FamilyXMEGA, ELFArchXMEGA3>;
Index: clang/test/Misc/target-invalid-cpu-note.c
===================================================================
--- clang/test/Misc/target-invalid-cpu-note.c
+++ clang/test/Misc/target-invalid-cpu-note.c
@@ -188,7 +188,11 @@
 // AVR-SAME: atxmega256a3, atxmega256a3u, atxmega256a3b, atxmega256a3bu, atxmega256c3,
 // AVR-SAME: atxmega256d3, atxmega384c3, atxmega384d3, atxmega128a1, atxmega128a1u,
 // AVR-SAME: atxmega128a4u, attiny4, attiny5, attiny9, attiny10, attiny20, attiny40,
-// AVR-SAME: attiny102, attiny104
+// AVR-SAME: attiny102, attiny104, attiny202, attiny402, attiny204, attiny404, attiny804,
+// AVR-SAME: attiny1604, attiny406, attiny806, attiny1606, attiny807, attiny1607,
+// AVR-SAME: attiny212, attiny412, attiny214, attiny414, attiny814, attiny1614,
+// AVR-SAME: attiny416, attiny816, attiny1616, attiny3216, attiny417, attiny817,
+// AVR-SAME: attiny1617, attiny3217
 
 // RUN: not %clang_cc1 -triple riscv32 -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix RISCV32
 // RISCV32: error: unknown target CPU 'not-a-cpu'
Index: clang/lib/Basic/Targets/AVR.cpp
===================================================================
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -274,6 +274,31 @@
     {"attiny40", "__AVR_ATtiny40__"},
     {"attiny102", "__AVR_ATtiny102__"},
     {"attiny104", "__AVR_ATtiny104__"},
+    {"attiny202", "__AVR_ATtiny202__"},
+    {"attiny402", "__AVR_ATtiny402__"},
+    {"attiny204", "__AVR_ATtiny204__"},
+    {"attiny404", "__AVR_ATtiny404__"},
+    {"attiny804", "__AVR_ATtiny804__"},
+    {"attiny1604", "__AVR_ATtiny1604__"},
+    {"attiny406", "__AVR_ATtiny406__"},
+    {"attiny806", "__AVR_ATtiny806__"},
+    {"attiny1606", "__AVR_ATtiny1606__"},
+    {"attiny807", "__AVR_ATtiny807__"},
+    {"attiny1607", "__AVR_ATtiny1607__"},
+    {"attiny212", "__AVR_ATtiny212__"},
+    {"attiny412", "__AVR_ATtiny412__"},
+    {"attiny214", "__AVR_ATtiny214__"},
+    {"attiny414", "__AVR_ATtiny414__"},
+    {"attiny814", "__AVR_ATtiny814__"},
+    {"attiny1614", "__AVR_ATtiny1614__"},
+    {"attiny416", "__AVR_ATtiny416__"},
+    {"attiny816", "__AVR_ATtiny816__"},
+    {"attiny1616", "__AVR_ATtiny1616__"},
+    {"attiny3216", "__AVR_ATtiny3216__"},
+    {"attiny417", "__AVR_ATtiny417__"},
+    {"attiny817", "__AVR_ATtiny817__"},
+    {"attiny1617", "__AVR_ATtiny1617__"},
+    {"attiny3217", "__AVR_ATtiny3217__"},
 };
 
 } // namespace targets


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