[PATCH] D105092: [RISCV] Add the tail policy argument to builtins/intrinsics.
Craig Topper via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Thu Sep 2 13:47:29 PDT 2021
craig.topper added inline comments.
================
Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:169
+ llvm_anyint_ty, LLVMMatchType<1>],
[NoCapture<ArgIndex<1>>, IntrReadMem]>, RISCVVIntrinsic;
// For unit stride fault-only-first load with mask
----------------
This needs ImmArg<ArgIndex<4>>. Similar for the rest. That will guarantee it is a constant and will make SelectionDAGBuilder create a target constant instead of a regular constant.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:248
+ // Policy must be a constant.
+ auto *PolicyNode = cast<ConstantSDNode>(Node->getOperand(CurOp++));
+ SDValue PolicyOp =
----------------
Can we use
```
uint64_t Policy = Node->getConstantOperandVal(CurOp++);
```
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:4761
+ if (!IsUnmasked)
+ Ops.push_back(DAG.getConstant(RISCVII::TAIL_AGNOSTIC, DL, XLenVT));
----------------
TargetConstant?
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:647
GPR:$rs1,
- VMaskOp:$vm, AVL:$vl, ixlenimm:$sew),[]>,
+ VMaskOp:$vm, AVL:$vl, ixlenimm:$sew, uimm5:$policy),[]>,
RISCVVPseudo,
----------------
Why uimm5? I think VPseudoTernaryNoMaskWithPolicy is using ixlenimm like $sew
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D105092/new/
https://reviews.llvm.org/D105092
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