[PATCH] D108886: Add RISC-V sifive-s51 cpu

Jessica Clarke via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Wed Sep 1 14:17:15 PDT 2021


jrtc27 added a comment.

In D108886#2977873 <https://reviews.llvm.org/D108886#2977873>, @apivovarov wrote:

> In D108886#2977733 <https://reviews.llvm.org/D108886#2977733>, @jrtc27 wrote:
>
>> You don't need to tag people as well as adding them as reviewers, it's just annoying. Also, it's only been four days; the developer policy is that for non-urgent patches you shouldn't ping more than once a week.
>
> Jessica, Contributing to LLVM says - To make sure the right people see your patch, please select suitable reviewers and add them to your patch when requesting a review. Suitable reviewers are the code owner (see CODE_OWNERS.txt) and other people doing work in the area your patch touches.
>
> The people I added as reviewers have contributed to RISC-V target code in the past.

Yeah, but that means adding them as reviewers, you don't also need to @ them in general.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108886/new/

https://reviews.llvm.org/D108886



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