[PATCH] D105269: [X86] AVX512FP16 instructions enabling 6/6

[Pengfei Wang via Phabricator via cfe-commits]

pengfei added inline comments.


================
Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3902
+  case X86::VFCMADDCSHZr:
+  case X86::VFCMADDCSHZrb:
+  case X86::VFCMADDCSHZrbk:
----------------
pengfei wrote:
> LuoYuanke wrote:
> > "b" means rounding. Right?
> broadcasting
Sorry, my mistake. Here `b` supposes to represent `EVEX.b` bit in the encoding.
It's used as broadcast control only in memory variants in vector instructions.
When it is used in register variants, it enables rounding control and SAE.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105269/new/

https://reviews.llvm.org/D105269