[PATCH] D107290: [PoC][RISCV] Add support for the vscale_range attribute

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVTargetMachine.cpp:106
+  assert(RVVBitsMin % 128 == 0 &&
+         "RVV requires vector length in multiples of 128!");
+  assert(RVVBitsMax % 128 == 0 &&
----------------
RISC-V require VLEN in power of 2, multiples of 128 is constraint for SVE :p
https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#2-implementation-defined-constant-parameters


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D107290/new/

https://reviews.llvm.org/D107290