[PATCH] D108702: [PowerPC][NFC] Rename P10 builtins vec_clrl, vec_clrr to vec_clr_first and vec_clr_last

[Victor Huang via Phabricator via cfe-commits]

NeHuang created this revision.
NeHuang added reviewers: amyk, lei, stefanp, PowerPC.
NeHuang added a project: LLVM.
Herald added subscribers: shchenz, kbarton, nemanjai.
NeHuang requested review of this revision.
Herald added a project: clang.

This patch renames the vector clear left/right builtins `vec_clrl`, `vec_clrr` to `vec_clr_first` and `vec_clr_last` to avoid the ambiguities when dealing with endianness.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D108702

Files:
  clang/lib/Headers/altivec.h
  clang/test/CodeGen/builtins-ppc-p10vector.c


Index: clang/test/CodeGen/builtins-ppc-p10vector.c
===================================================================
--- clang/test/CodeGen/builtins-ppc-p10vector.c
+++ clang/test/CodeGen/builtins-ppc-p10vector.c
@@ -732,36 +732,36 @@
   return vec_genpcvm(vulla, 0);
 }
 
-vector signed char test_vec_vclrl_sc(void) {
+vector signed char test_vec_clr_first_sc(void) {
   // CHECK-BE: @llvm.ppc.altivec.vclrlb(<16 x i8>
   // CHECK-BE-NEXT: ret <16 x i8>
   // CHECK-LE: @llvm.ppc.altivec.vclrrb(<16 x i8>
   // CHECK-LE-NEXT: ret <16 x i8>
-  return vec_clrl(vsca, uia);
+  return vec_clr_first(vsca, uia);
 }
 
-vector unsigned char test_vec_clrl_uc(void) {
+vector unsigned char test_vec_clr_first_uc(void) {
   // CHECK-BE: @llvm.ppc.altivec.vclrlb(<16 x i8>
   // CHECK-BE-NEXT: ret <16 x i8>
   // CHECK-LE: @llvm.ppc.altivec.vclrrb(<16 x i8>
   // CHECK-LE-NEXT: ret <16 x i8>
-  return vec_clrl(vuca, uia);
+  return vec_clr_first(vuca, uia);
 }
 
-vector signed char test_vec_vclrr_sc(void) {
+vector signed char test_vec_clr_last_sc(void) {
   // CHECK-BE: @llvm.ppc.altivec.vclrrb(<16 x i8>
   // CHECK-BE-NEXT: ret <16 x i8>
   // CHECK-LE: @llvm.ppc.altivec.vclrlb(<16 x i8>
   // CHECK-LE-NEXT: ret <16 x i8>
-  return vec_clrr(vsca, uia);
+  return vec_clr_last(vsca, uia);
 }
 
-vector unsigned char test_vec_clrr_uc(void) {
+vector unsigned char test_vec_clr_last_uc(void) {
   // CHECK-BE: @llvm.ppc.altivec.vclrrb(<16 x i8>
   // CHECK-BE-NEXT: ret <16 x i8>
   // CHECK-LE: @llvm.ppc.altivec.vclrlb(<16 x i8>
   // CHECK-LE-NEXT: ret <16 x i8>
-  return vec_clrr(vuca, uia);
+  return vec_clr_last(vuca, uia);
 }
 
 vector unsigned long long test_vclzdm(void) {
Index: clang/lib/Headers/altivec.h
===================================================================
--- clang/lib/Headers/altivec.h
+++ clang/lib/Headers/altivec.h
@@ -18312,10 +18312,10 @@
            : __builtin_vsx_xxgenpcvdm((__a), (int)(__imm)))
 #endif /* __VSX__ */
 
-/* vec_clrl */
+/* vec_clr_first */
 
 static __inline__ vector signed char __ATTRS_o_ai
-vec_clrl(vector signed char __a, unsigned int __n) {
+vec_clr_first(vector signed char __a, unsigned int __n) {
 #ifdef __LITTLE_ENDIAN__
   return __builtin_altivec_vclrrb(__a, __n);
 #else
@@ -18324,7 +18324,7 @@
 }
 
 static __inline__ vector unsigned char __ATTRS_o_ai
-vec_clrl(vector unsigned char __a, unsigned int __n) {
+vec_clr_first(vector unsigned char __a, unsigned int __n) {
 #ifdef __LITTLE_ENDIAN__
   return __builtin_altivec_vclrrb((vector signed char)__a, __n);
 #else
@@ -18332,10 +18332,10 @@
 #endif
 }
 
-/* vec_clrr */
+/* vec_clr_last */
 
 static __inline__ vector signed char __ATTRS_o_ai
-vec_clrr(vector signed char __a, unsigned int __n) {
+vec_clr_last(vector signed char __a, unsigned int __n) {
 #ifdef __LITTLE_ENDIAN__
   return __builtin_altivec_vclrlb(__a, __n);
 #else
@@ -18344,7 +18344,7 @@
 }
 
 static __inline__ vector unsigned char __ATTRS_o_ai
-vec_clrr(vector unsigned char __a, unsigned int __n) {
+vec_clr_last(vector unsigned char __a, unsigned int __n) {
 #ifdef __LITTLE_ENDIAN__
   return __builtin_altivec_vclrlb((vector signed char)__a, __n);
 #else


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