[PATCH] D105267: [X86] AVX512FP16 instructions enabling 4/6

[Pengfei Wang via Phabricator via cfe-commits]

pengfei added inline comments.


================
Comment at: clang/include/clang/Basic/BuiltinsX86.def:1897
+
+TARGET_BUILTIN(__builtin_ia32_rndscaleph_128_mask, "V8xV8xIiV8xUc", "ncV:128:", "avx512fp16,avx512vl")
+TARGET_BUILTIN(__builtin_ia32_rndscaleph_256_mask, "V16xV16xIiV16xUs", "ncV:256:", "avx512fp16,avx512vl")
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LuoYuanke wrote:
> The naming convention is not consistent. Rename it to rndscaleph128?
I agree it should be better to be consistent with the naming convention mostly used. But I found rndscaleps/pd are using the same way here. Changing here will result in inconsistent somewhere.
I think consistent with ps/pd should be better.
The following builtin names have the same problem.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D105267/new/

https://reviews.llvm.org/D105267