[PATCH] D105265: [X86] AVX512FP16 instructions enabling 3/6

[Pengfei Wang via Phabricator via cfe-commits]

pengfei added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:1996
       setOperationAction(ISD::SCALAR_TO_VECTOR,   MVT::v16f16, Custom);
+      setOperationAction(ISD::SINT_TO_FP,         MVT::v16i16, Legal);
+      setOperationAction(ISD::STRICT_SINT_TO_FP,  MVT::v16i16, Legal);
----------------
pengfei wrote:
> LuoYuanke wrote:
> > How do we know it covert to v16f16? Is it possible convert to v16f32?
> No. Because `v16f32` is not a legal type on X86.
Sorry, I mistook it with `v32f32`.
The answer is still no. But because we extend `v16i16` to `v16i32` in `combineS(U)IntToFP` at the begining. So we don't need to worry about there's no a legal `v16i16` to `v16f32`.


Repository:
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  https://reviews.llvm.org/D105265/new/

https://reviews.llvm.org/D105265