[PATCH] D106518: [RISCV] Disable EEW=64 for index values when XLEN=32.

[Craig Topper via Phabricator via cfe-commits]

craig.topper added inline comments.


================
Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:179
                const std::vector<int64_t> &IntrinsicTypes,
-               StringRef RequiredExtension, unsigned NF);
+               const std::vector<StringRef> RequiredExtensions, unsigned NF);
   ~RVVIntrinsic() = default;
----------------
RequiredExtensions should be a reference


================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:349
+  if (IndexLog2EEW == 6 && !Subtarget->is64Bit()) {
+    errs() << "The V extension does not support EEW=64 for index values "
+              "when XLEN=32\n";
----------------
This would just print a message to stderr but wouldn't fail the program. Probably should use report_fatal_error. Or we could let the caller go to SelectCode which would also trigger a "Cannot select" fatal error.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:430
+  if (IndexLog2EEW == 6 && !Subtarget->is64Bit()) {
+    errs() << "The V extension does not support EEW=64 for index values "
+              "when XLEN=32\n";
----------------
Same as above


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D106518/new/

https://reviews.llvm.org/D106518