[PATCH] D107139: [RISCV] Rename vector inline constraint from 'v' to 'vr' and 'vm' in IR.
Hsiangkai Wang via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Sat Jul 31 15:01:14 PDT 2021
This revision was automatically updated to reflect the committed changes.
Closed by commit rG8b33839f010f: [RISCV] Rename vector inline constraint from 'v' to 'vr' and 'vm' in IR. (authored by HsiangKai).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D107139/new/
https://reviews.llvm.org/D107139
Files:
clang/lib/Basic/Targets/RISCV.cpp
clang/test/CodeGen/RISCV/riscv-inline-asm-rvv.c
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/rvv/inline-asm.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D107139.363321.patch
Type: text/x-patch
Size: 13644 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/cfe-commits/attachments/20210731/b3b40c03/attachment-0001.bin>
More information about the cfe-commits
mailing list