[PATCH] D106939: [RISCV] If the maskedoff is vundefined(), use ta, ma for vsetvli.

[Craig Topper via Phabricator via cfe-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:379
   bool ForceTailAgnostic = RISCVII::doesForceTailAgnostic(TSFlags);
+  // hasDummyMaskOp(TSFlags) == ture means it is a non-masked instruction.
+  // FIXME: hasDummyMaskOp() is the closest attribute to distinguish masked
----------------
ture -> true


================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:382
+  // and non-masked instructions. However, there are some exceptions for this
+  // attribute. PseudoVMV_V_[VXI] and PseudoVFMV_V_F have no need to append
+  // the dummy mask operand in MC lowering and they are non-masked instructions.
----------------
Wouldn't the lack of tied operand for those indicate they weren't masked.

What if we did

```
bool MaskAgnostic = true;
if (MI.isRegTiedToUseOperand(0, &UseOpIdx)) {
  MaskAgnostic = RISCVII::hasDummyMaskOp(TSFlags);
}
```


================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:384
+  // the dummy mask operand in MC lowering and they are non-masked instructions.
+  bool MaskAgnostic = RISCVII::hasDummyMaskOp(TSFlags) ? true : false;
   bool TailAgnostic = true;
----------------
Doesn't have hasDummyMaskOp return a bool? We shouldn't need a conditional operator.


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D106939/new/

https://reviews.llvm.org/D106939