[clang] edbdf8e - [AIX] Update fetch_and_add type

[Jinsong Ji via cfe-commits]

Author: Jinsong Ji
Date: 2021-07-27T22:13:29Z
New Revision: edbdf8e5b5aad9f1d7f12dd4025d6811a6fff0b2

URL: https://github.com/llvm/llvm-project/commit/edbdf8e5b5aad9f1d7f12dd4025d6811a6fff0b2
DIFF: https://github.com/llvm/llvm-project/commit/edbdf8e5b5aad9f1d7f12dd4025d6811a6fff0b2.diff

LOG: [AIX] Update fetch_and_add type

It turns out that the AIX kernel is defining int instead of unsigned int for fetch_and_add.

Legacy XL also defines this to be signed.

https://www.ibm.com/docs/en/aix/7.2?topic=f-fetch-add-kernel-services

So update the type for compat.

Reviewed By: hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D106920

Added: 
    

Modified: 
    clang/include/clang/Basic/BuiltinsPPC.def
    clang/test/CodeGen/builtins-ppc-xlcompat-fetch-error.c
    clang/test/CodeGen/builtins-ppc-xlcompat-fetch.c

Removed: 
    


################################################################################
diff  --git a/clang/include/clang/Basic/BuiltinsPPC.def b/clang/include/clang/Basic/BuiltinsPPC.def
index 3873231cdfe4..dfe97af300f4 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -64,8 +64,8 @@ BUILTIN(__builtin_ppc_fsqrt, "dd", "")
 BUILTIN(__builtin_ppc_fsqrts, "ff", "")
 BUILTIN(__builtin_ppc_compare_and_swap, "iiD*i*i", "")
 BUILTIN(__builtin_ppc_compare_and_swaplp, "iLiD*Li*Li", "")
-BUILTIN(__builtin_ppc_fetch_and_add, "UiUiD*Ui", "")
-BUILTIN(__builtin_ppc_fetch_and_addlp, "ULiULiD*ULi", "")
+BUILTIN(__builtin_ppc_fetch_and_add, "iiD*i", "")
+BUILTIN(__builtin_ppc_fetch_and_addlp, "LiLiD*Li", "")
 BUILTIN(__builtin_ppc_fetch_and_and, "UiUiD*Ui", "")
 BUILTIN(__builtin_ppc_fetch_and_andlp, "ULiULiD*ULi", "")
 BUILTIN(__builtin_ppc_fetch_and_or, "UiUiD*Ui", "")

diff  --git a/clang/test/CodeGen/builtins-ppc-xlcompat-fetch-error.c b/clang/test/CodeGen/builtins-ppc-xlcompat-fetch-error.c
index a5124e3c10e9..3e9042df7a2c 100644
--- a/clang/test/CodeGen/builtins-ppc-xlcompat-fetch-error.c
+++ b/clang/test/CodeGen/builtins-ppc-xlcompat-fetch-error.c
@@ -1,17 +1,18 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
 // REQUIRES: powerpc-registered-target
 // RUN: %clang_cc1 -triple powerpc64-unknown-aix -target-cpu pwr8 \
 // RUN:  -verify %s
 
 void test_builtin_ppc_fetch_and_add2() {
-  volatile int a = 0;
+  volatile unsigned int a = 0;
   unsigned int b = 0;
 
-  __fetch_and_add(&a, b); // expected-warning {{passing 'volatile int *' to parameter of type 'volatile unsigned int *' converts between pointers to integer types with 
diff erent sign}}
+  __fetch_and_add(&a, b); // expected-warning {{passing 'volatile unsigned int *' to parameter of type 'volatile int *' converts between pointers to integer types with 
diff erent sign}}
 }
 
 void test_builtin_ppc_fetch_and_addlp() {
-  volatile long a = 0;
+  volatile unsigned long a = 0;
   unsigned long b = 0;
 
-  __fetch_and_addlp(&a, b); // expected-warning {{passing 'volatile long *' to parameter of type 'volatile unsigned long *' converts between pointers to integer types with 
diff erent sign}}
+  __fetch_and_addlp(&a, b); // expected-warning {{passing 'volatile unsigned long *' to parameter of type 'volatile long *' converts between pointers to integer types with 
diff erent sign}}
 }

diff  --git a/clang/test/CodeGen/builtins-ppc-xlcompat-fetch.c b/clang/test/CodeGen/builtins-ppc-xlcompat-fetch.c
index 7d0b674b39c2..8b2b3630300d 100644
--- a/clang/test/CodeGen/builtins-ppc-xlcompat-fetch.c
+++ b/clang/test/CodeGen/builtins-ppc-xlcompat-fetch.c
@@ -16,7 +16,7 @@
 // CHECK-NEXT:    [[TMP2:%.*]] = atomicrmw add i32* [[A_ADDR]], i32 [[TMP1]] monotonic, align 4
 // CHECK-NEXT:    ret void
 //
-void test_builtin_ppc_fetch_and_add(unsigned int a, unsigned int b) {
+void test_builtin_ppc_fetch_and_add(int a, int b) {
   __fetch_and_add(&a, b);
 }
 
@@ -31,7 +31,7 @@ void test_builtin_ppc_fetch_and_add(unsigned int a, unsigned int b) {
 // CHECK-NEXT:    [[TMP2:%.*]] = atomicrmw add i64* [[A_ADDR]], i64 [[TMP1]] monotonic, align 8
 // CHECK-NEXT:    ret void
 //
-void test_builtin_ppc_fetch_and_addlp(unsigned long a, unsigned long b) {
+void test_builtin_ppc_fetch_and_addlp(long a, long b) {
   __fetch_and_addlp(&a, b);
 }
 // CHECK-LABEL: @test_builtin_ppc_fetch_and_and(