[PATCH] D105092: [PoC][RISCV] Add the tail policy argument to builtins/intrinsics.
Craig Topper via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Wed Jul 21 15:11:31 PDT 2021
craig.topper added a comment.
Does lowerRISCVVMachineInstrToMCInst in RISCVMCInstLower.cpp need to know to skip the policy op?
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Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:405
if (RISCVII::hasVLOp(TSFlags)) {
const MachineOperand &VLOp = MI.getOperand(MI.getNumExplicitOperands() - 2);
if (VLOp.isImm())
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Why doesn't this need to be updated?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D105092/new/
https://reviews.llvm.org/D105092
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