[PATCH] D105001: [Clang][RISCV] Support half-precision floating point for RVV intrinsics.

[Craig Topper via Phabricator via cfe-commits]

craig.topper added inline comments.


================
Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:512
+        Str += "_Float16";
+      assert((ElementBitwidth == 16 || ElementBitwidth == 32 ||
+              ElementBitwidth == 64) &&
----------------
Can we use an else and an llvm_unreachable or PrintFatalError to avoid repeating the bit widths twices?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105001/new/

https://reviews.llvm.org/D105001