[clang] 781929b - [PowerPC][NFC] Power ISA features for Semachecking
Victor Huang via cfe-commits
cfe-commits at lists.llvm.org
Tue Jul 13 11:23:58 PDT 2021
Author: Victor Huang
Date: 2021-07-13T13:13:34-05:00
New Revision: 781929b4236bc34681fb0783cf7b6021109fe28b
URL: https://github.com/llvm/llvm-project/commit/781929b4236bc34681fb0783cf7b6021109fe28b
DIFF: https://github.com/llvm/llvm-project/commit/781929b4236bc34681fb0783cf7b6021109fe28b.diff
LOG: [PowerPC][NFC] Power ISA features for Semachecking
[NFC] This patch adds features for pwr7, pwr8, and pwr9 that can be
used for semachecking builtin functions that are only valid for certain
versions of ppc.
Reviewed By: nemanjai, #powerpc
Authored By: Quinn Pham <Quinn.Pham at ibm.com>
Differential revision: https://reviews.llvm.org/D105501
Added:
clang/test/Driver/ppc-isa-features.cpp
Modified:
clang/include/clang/Basic/DiagnosticSemaKinds.td
clang/lib/Basic/Targets/PPC.cpp
clang/lib/Basic/Targets/PPC.h
clang/lib/Sema/SemaChecking.cpp
llvm/lib/Target/PowerPC/PPC.td
llvm/lib/Target/PowerPC/PPCInstrInfo.td
llvm/lib/Target/PowerPC/PPCSubtarget.cpp
llvm/lib/Target/PowerPC/PPCSubtarget.h
Removed:
################################################################################
diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index 2d62163e3dcc..422507cd2842 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -9757,8 +9757,8 @@ def err_mips_builtin_requires_dspr2 : Error<
"this builtin requires 'dsp r2' ASE, please use -mdspr2">;
def err_mips_builtin_requires_msa : Error<
"this builtin requires 'msa' ASE, please use -mmsa">;
-def err_ppc_builtin_only_on_pwr7 : Error<
- "this builtin is only valid on POWER7 or later CPUs">;
+def err_ppc_builtin_only_on_arch : Error<
+ "this builtin is only valid on POWER%0 or later CPUs">;
def err_ppc_invalid_use_mma_type : Error<
"invalid use of PPC MMA type">;
def err_x86_builtin_invalid_rounding : Error<
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index b77b4a38bc46..514f1a031ae7 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -73,6 +73,12 @@ bool PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
HasROPProtect = true;
} else if (Feature == "+privileged") {
HasPrivileged = true;
+ } else if (Feature == "+isa-v207-instructions") {
+ IsISA2_07 = true;
+ } else if (Feature == "+isa-v30-instructions") {
+ IsISA3_0 = true;
+ } else if (Feature == "+isa-v31-instructions") {
+ IsISA3_1 = true;
}
// TODO: Finish this list and add an assert that we've handled them
// all.
@@ -390,6 +396,15 @@ bool PPCTargetInfo::initFeatureMap(
.Case("e500", true)
.Default(false);
+ Features["isa-v207-instructions"] = llvm::StringSwitch<bool>(CPU)
+ .Case("ppc64le", true)
+ .Case("pwr9", true)
+ .Case("pwr8", true)
+ .Default(false);
+
+ Features["isa-v30-instructions"] =
+ llvm::StringSwitch<bool>(CPU).Case("pwr9", true).Default(false);
+
// Power10 includes all the same features as Power9 plus any features specific
// to the Power10 core.
if (CPU == "pwr10" || CPU == "power10") {
@@ -446,6 +461,7 @@ void PPCTargetInfo::addP10SpecificFeatures(
Features["power10-vector"] = true;
Features["pcrelative-memops"] = true;
Features["prefix-instrs"] = true;
+ Features["isa-v31-instructions"] = true;
return;
}
@@ -476,6 +492,9 @@ bool PPCTargetInfo::hasFeature(StringRef Feature) const {
.Case("mma", HasMMA)
.Case("rop-protect", HasROPProtect)
.Case("privileged", HasPrivileged)
+ .Case("isa-v207-instructions", IsISA2_07)
+ .Case("isa-v30-instructions", IsISA3_0)
+ .Case("isa-v31-instructions", IsISA3_1)
.Default(false);
}
diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h
index bd79c68ce3f7..7c14a4eb9410 100644
--- a/clang/lib/Basic/Targets/PPC.h
+++ b/clang/lib/Basic/Targets/PPC.h
@@ -74,6 +74,9 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo {
bool HasP10Vector = false;
bool HasPCRelativeMemops = false;
bool HasPrefixInstrs = false;
+ bool IsISA2_07 = false;
+ bool IsISA3_0 = false;
+ bool IsISA3_1 = false;
protected:
std::string ABI;
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index 99621a226dea..062c7eb4a12e 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -3275,10 +3275,18 @@ static bool isPPC_64Builtin(unsigned BuiltinID) {
}
static bool SemaFeatureCheck(Sema &S, CallExpr *TheCall,
- StringRef FeatureToCheck, unsigned DiagID) {
- if (!S.Context.getTargetInfo().hasFeature(FeatureToCheck))
- return S.Diag(TheCall->getBeginLoc(), DiagID) << TheCall->getSourceRange();
- return false;
+ StringRef FeatureToCheck, unsigned DiagID,
+ StringRef DiagArg = "") {
+ if (S.Context.getTargetInfo().hasFeature(FeatureToCheck))
+ return false;
+
+ if (DiagArg.empty())
+ S.Diag(TheCall->getBeginLoc(), DiagID) << TheCall->getSourceRange();
+ else
+ S.Diag(TheCall->getBeginLoc(), DiagID)
+ << DiagArg << TheCall->getSourceRange();
+
+ return true;
}
bool Sema::CheckPPCBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
@@ -3320,17 +3328,17 @@ bool Sema::CheckPPCBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
case PPC::BI__builtin_divde:
case PPC::BI__builtin_divdeu:
return SemaFeatureCheck(*this, TheCall, "extdiv",
- diag::err_ppc_builtin_only_on_pwr7);
+ diag::err_ppc_builtin_only_on_arch, "7");
case PPC::BI__builtin_bpermd:
return SemaFeatureCheck(*this, TheCall, "bpermd",
- diag::err_ppc_builtin_only_on_pwr7);
+ diag::err_ppc_builtin_only_on_arch, "7");
case PPC::BI__builtin_unpack_vector_int128:
return SemaFeatureCheck(*this, TheCall, "vsx",
- diag::err_ppc_builtin_only_on_pwr7) ||
+ diag::err_ppc_builtin_only_on_arch, "7") ||
SemaBuiltinConstantArgRange(TheCall, 1, 0, 1);
case PPC::BI__builtin_pack_vector_int128:
return SemaFeatureCheck(*this, TheCall, "vsx",
- diag::err_ppc_builtin_only_on_pwr7);
+ diag::err_ppc_builtin_only_on_arch, "7");
case PPC::BI__builtin_altivec_vgnb:
return SemaBuiltinConstantArgRange(TheCall, 1, 2, 7);
case PPC::BI__builtin_altivec_vec_replace_elt:
diff --git a/clang/test/Driver/ppc-isa-features.cpp b/clang/test/Driver/ppc-isa-features.cpp
new file mode 100644
index 000000000000..9e2bc3f90bf7
--- /dev/null
+++ b/clang/test/Driver/ppc-isa-features.cpp
@@ -0,0 +1,21 @@
+// RUN: %clang -target powerpc64-unknown-unknown -mcpu=pwr7 -S -emit-llvm %s -o - | FileCheck %s -check-prefix=CHECK-PWR7
+// RUN: %clang -target powerpc64le-unknown-unknown -mcpu=pwr8 -S -emit-llvm %s -o - | FileCheck %s -check-prefix=CHECK-PWR8
+// RUN: %clang -target powerpc64-unknown-aix -mcpu=pwr9 -S -emit-llvm %s -o - | FileCheck %s -check-prefix=CHECK-PWR9
+// RUN: %clang -target powerpc-unknown-aix -mcpu=pwr10 -S -emit-llvm %s -o - | FileCheck %s -check-prefix=CHECK-PWR10
+
+// CHECK-PWR7: -isa-v207-instructions
+// CHECK-PWR7: -isa-v30-instructions
+
+// CHECK-PWR8: +isa-v207-instructions
+// CHECK-PWR8: -isa-v30-instructions
+
+// CHECK-PWR9: +isa-v207-instructions
+// CHECK-PWR9: +isa-v30-instructions
+
+// CHECK-PWR10: +isa-v207-instructions
+// CHECK-PWR10: +isa-v30-instructions
+// CHECK-PWR10: +isa-v31-instructions
+
+int main(int argc, char *argv[]) {
+ return 0;
+}
diff --git a/llvm/lib/Target/PowerPC/PPC.td b/llvm/lib/Target/PowerPC/PPC.td
index 0503cbcdf629..36d119c7ee16 100644
--- a/llvm/lib/Target/PowerPC/PPC.td
+++ b/llvm/lib/Target/PowerPC/PPC.td
@@ -210,9 +210,13 @@ def FeatureSlowPOPCNTD : SubtargetFeature<"slow-popcntd","HasPOPCNTD",
def DeprecatedDST : SubtargetFeature<"", "DeprecatedDST", "true",
"Treat vector data stream cache control instructions as deprecated">;
+def FeatureISA2_07 : SubtargetFeature<"isa-v207-instructions", "IsISA2_07",
+ "true",
+ "Enable instructions in ISA 2.07.">;
def FeatureISA3_0 : SubtargetFeature<"isa-v30-instructions", "IsISA3_0",
"true",
- "Enable instructions in ISA 3.0.">;
+ "Enable instructions in ISA 3.0.",
+ [FeatureISA2_07]>;
def FeatureISA3_1 : SubtargetFeature<"isa-v31-instructions", "IsISA3_1",
"true",
"Enable instructions in ISA 3.1.",
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
index ce3a2570bbda..0ca4ef62fa84 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -1176,6 +1176,7 @@ def NaNsFPMath
: Predicate<"!Subtarget->getTargetMachine().Options.NoNaNsFPMath">;
def HasBPERMD : Predicate<"Subtarget->hasBPERMD()">;
def HasExtDiv : Predicate<"Subtarget->hasExtDiv()">;
+def IsISA2_07 : Predicate<"Subtarget->isISA2_07()">;
def IsISA3_0 : Predicate<"Subtarget->isISA3_0()">;
def HasFPU : Predicate<"Subtarget->hasFPU()">;
def PCRelativeMemops : Predicate<"Subtarget->hasPCRelativeMemops()">;
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
index 9bff07a1de0d..c8503c6a261a 100644
--- a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
+++ b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -126,6 +126,7 @@ void PPCSubtarget::initializeEnvironment() {
HasStoreFusion = false;
HasAddiLoadFusion = false;
HasAddisLoadFusion = false;
+ IsISA2_07 = false;
IsISA3_0 = false;
IsISA3_1 = false;
UseLongCalls = false;
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.h b/llvm/lib/Target/PowerPC/PPCSubtarget.h
index 56b7b8ab7549..17139a85a812 100644
--- a/llvm/lib/Target/PowerPC/PPCSubtarget.h
+++ b/llvm/lib/Target/PowerPC/PPCSubtarget.h
@@ -146,6 +146,7 @@ class PPCSubtarget : public PPCGenSubtargetInfo {
bool HasStoreFusion;
bool HasAddiLoadFusion;
bool HasAddisLoadFusion;
+ bool IsISA2_07;
bool IsISA3_0;
bool IsISA3_1;
bool UseLongCalls;
@@ -319,6 +320,7 @@ class PPCSubtarget : public PPCGenSubtargetInfo {
bool hasHTM() const { return HasHTM; }
bool hasFloat128() const { return HasFloat128; }
+ bool isISA2_07() const { return IsISA2_07; }
bool isISA3_0() const { return IsISA3_0; }
bool isISA3_1() const { return IsISA3_1; }
bool useLongCalls() const { return UseLongCalls; }
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