[PATCH] D105635: [PowerPC][AIX] Fix Zero-width bit fields wrt MaxFieldAlign.

Zarko Todorovski via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Fri Jul 9 10:54:38 PDT 2021


ZarkoCA accepted this revision.
ZarkoCA added a comment.
This revision is now accepted and ready to land.

LGTM but I have a strong preference that `clang/test/Layout/aix-packed-bitfields.c` be committed separately if my understanding is right.



================
Comment at: clang/test/Layout/aix-bitfield-alignment.c:236
+
+#pragma align(packed)
+struct H {
----------------
nit: I prefer having these test cases together with the other `#pragma align/pack` test cases.


================
Comment at: clang/test/Layout/aix-packed-bitfields.c:1
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN:     -fsyntax-only -fxl-pragma-pack -x c %s | FileCheck  %s
----------------
AFAIU this test case is not affected by your changes here.  Maybe commit this as a separate NFC patch? 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105635/new/

https://reviews.llvm.org/D105635



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