[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

Fri Jul 9 08:19:10 PDT 2021

labrinea added a comment.

In D94098#2865372 <https://reviews.llvm.org/D94098#2865372>, @efriedma wrote:

> I'm confused what your goal here is, exactly.  The point of allowing 512-bit inline asm operands is presumably to allow writing efficient code involving inline asm... but you're intentionally destroying any potential efficiency by forcing it to be passed/returned in memory.  If the user wanted to do that, they could just use an "m" constraint.
>
> It looks like SelectionDAG currently crashes if you try to pass an array as an inline asm operand, but that should be possible to fix, I think.

I have explained in the description why I am doing this: i512 is not a qualified type and so it is not possible to emit the store instruction required for output operands (line 2650 in the original code of clang/lib/CodeGen/CGStmt.cpp). As I said clang has already tests in place for this case (clang/test/CodeGen/X86/x86_64-PR42672.c - function big_struct), so I don't see how I am destroying the efficient codegen, which only applies to small sized integers (because they have a qualified type). Can you suggest a better solution?

Regarding the Selection DAG, my patches https://reviews.llvm.org/D94096 and https://reviews.llvm.org/D94097 are adding support for this use case in the backend. @t.p.northover has raised a concern there too, so maybe my original set of patches (including a dedicated IR type) in the RFC https://lists.llvm.org/pipermail/llvm-dev/2020-November/146860.html were a better fit?

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94098/new/

https://reviews.llvm.org/D94098