[PATCH] D105236: [PowerPC] Implement Load and Reserve and Store Conditional Builtins

Nemanja Ivanovic via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Fri Jul 9 02:57:33 PDT 2021


nemanjai added inline comments.


================
Comment at: llvm/include/llvm/IR/IntrinsicsPowerPC.td:1533
+  def int_ppc_lwarx : GCCBuiltin<"__builtin_ppc_lwarx">,
+                      Intrinsic<[llvm_i32_ty], [llvm_ptr_ty], [IntrNoMem]>;
+  def int_ppc_ldarx : GCCBuiltin<"__builtin_ppc_ldarx">,
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I don't know why I missed this in the review, but this is very wrong! This is a load intrinsic that is marked as one that doesn't touch memory.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105236/new/

https://reviews.llvm.org/D105236



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