[PATCH] D105626: [RISCV][Clang] Add macro __riscv_zvlsseg for RVV Zvlsseg builtins

Jianjian Guan via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Thu Jul 8 20:20:21 PDT 2021


jacquesguan updated this revision to Diff 357408.
jacquesguan added a comment.

Add target feature zvlsseg for rvv-intrinsics/vlsegff.c


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105626/new/

https://reviews.llvm.org/D105626

Files:
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vlseg.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vlsegff.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vlseg.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vlsegff.c
  clang/utils/TableGen/RISCVVEmitter.cpp

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