[PATCH] D105142: RFC: Implementing new mechanism for hard register operands to inline asm as a constraint.

[David Chisnall via Phabricator via cfe-commits]

theraven added a comment.

In D105142#2850247 <https://reviews.llvm.org/D105142#2850247>, @anirudhp wrote:

> In D105142#2849835 <https://reviews.llvm.org/D105142#2849835>, @theraven wrote:
>
>> The code looks fine but it would be good to see some docs along with it.  We're currently missing docs on inline assembly entirely and the GCC ones are somewhat... opaque when it comes to describing how constraints work.
>
> Thank you for your feedback! By docs do you mind updating/adding some information to the existing LLVM docs(like the langref https://llvm.org/docs/LangRef.html for example), or more comments to the code?

I meant user-facing clang docs.  This is not an IR change, so it does not belong in LangRef, but the only reference to inline assembly in clang's documentation <https://clang.llvm.org/docs/LanguageExtensions.html> is a reference to the GCC docs (which are almost incomprehensible in general because they were very x86-specific and were then tweaked a bit to be portable, and specifically don't mention this feature).  If we are adding a new user-facing feature, we need to provide user-facing documentation for it.  Ideally this would provide complete documentation of inline assembly supported by clang, but at least we should document this feature as an extension.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105142/new/

https://reviews.llvm.org/D105142