[PATCH] D95588: [RISCV] Implement the MC layer support of P extension
Craig Topper via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Wed Jul 7 11:57:42 PDT 2021
craig.topper added inline comments.
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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoP.td:599
+ Sched<[]>;
+def SMBB32 : RVPBinary<0b0000100, 0b010, "smbb32">,
+ Sched<[]>;
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It looks like the 0.9.3 spec lists this as an alias of MULSR64 and does not give it an encoding.
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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoP.td:737
+ Sched<[]>;
+def KMADA32 : RVPTernary<0b0100100, 0b010, "kmada32">,
+ Sched<[]>;
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0.9.3 spec has this as an alias of KMAR64
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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoP.td:835
+ Predicates = [HasStdExtZpn] in
+def INSB : RVInstR<0b1010110, 0b000, OPC_OP_P, (outs GPR:$rd),
+ (ins GPR:$rs2, GPR:$rs1, uimmlog2xlenbytes:$shamt),
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I believe way this has been done on other extensions is to have `(outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, uimmlog2xlenbytes:$shamt)` and `let Constraints = "$rd = $rd_wb"`
And I don't think it should inherit from RVInstR since it doesn't have a real rs2.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D95588/new/
https://reviews.llvm.org/D95588
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