[PATCH] D105501: [PowerPC] Power ISA features for Semachecking

Qiu Chaofan via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Tue Jul 6 22:10:47 PDT 2021


qiucf added inline comments.


================
Comment at: clang/lib/Basic/Targets/PPC.cpp:425
 
+  Features["isa207"] = llvm::StringSwitch<bool>(CPU)
+                           .Case("pwr9", true)
----------------
Will it be better if name to `isa2_07`, `isa3_0` to make it less confusing?

Besides, in backend we have subtarget features `isa-v30-instructions` and `isa-v31-instructions` but they're not present at frontend, we should pass these feature flags to backend correctly.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105501/new/

https://reviews.llvm.org/D105501



More information about the cfe-commits mailing list