[PATCH] D105501: [PowerPC] Power ISA features for Semachecking

[Quinn Pham via Phabricator via cfe-commits]

quinnp updated this revision to Diff 356774.
quinnp added a comment.

Updating pwr10 features to include previous features.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105501/new/

https://reviews.llvm.org/D105501

Files:
  clang/lib/Basic/Targets/PPC.cpp


Index: clang/lib/Basic/Targets/PPC.cpp
===================================================================
--- clang/lib/Basic/Targets/PPC.cpp
+++ clang/lib/Basic/Targets/PPC.cpp
@@ -422,6 +422,14 @@
     return false;
   }
 
+  Features["isa207"] = llvm::StringSwitch<bool>(CPU)
+                           .Case("pwr9", true)
+                           .Case("ppc64le", true)
+                           .Case("pwr8", true)
+                           .Default(false);
+  Features["isa30"] =
+      llvm::StringSwitch<bool>(CPU).Case("pwr9", true).Default(false);
+
   return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
 }
 
@@ -434,6 +442,9 @@
   Features["power10-vector"] = true;
   Features["pcrelative-memops"] = true;
   Features["prefix-instrs"] = true;
+  Features["isa207"] = true;
+  Features["isa30"] = true;
+  Features["isa31"] = true;
   return;
 }
 


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