[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins
Amy Kwan via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Jul 5 14:08:54 PDT 2021
amyk accepted this revision as: amyk.
amyk added a comment.
Also LGTM overall.
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Comment at: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN: -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
----------------
nit: Add `-ppc-asm-full-reg-names`.
================
Comment at: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll:3
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN: -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
----------------
nit: Add `-ppc-asm-full-reg-names`.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D105236/new/
https://reviews.llvm.org/D105236
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