[PATCH] D105236: [PowerPC] Implament Atomic Load and Stores Builtins
Amy Kwan via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Jul 5 06:03:36 PDT 2021
amyk added inline comments.
================
Comment at: llvm/include/llvm/IR/IntrinsicsPowerPC.td:1534
+ Intrinsic<[llvm_i64_ty], [llvm_ptr_ty], [IntrNoMem]>;
}
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Is there an unintended change at the end?
================
Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:2841
+let Predicates = [HasP8Altivec] in {
+ def : Pat<(int_ppc_lwarx xoaddr:$dst),
+ (LWARX xoaddr:$dst)>;
----------------
Why are these patterns in `PPCInstrPrefix.td`? Shouldn't they be in `PPCInstrInfo.td`?
Also, you can probably use `ForceXForm` instead of `xoaddr` here.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D105236/new/
https://reviews.llvm.org/D105236
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