[PATCH] D105097: [clang][AArch64][SVE] Handle PRValue under VLAT <-> VLST cast

[Eli Friedman via Phabricator via cfe-commits]

efriedma accepted this revision.
efriedma added a comment.
This revision is now accepted and ready to land.

LGTM



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Comment at: clang/test/CodeGen/attr-arm-sve-vector-bits-globals.c:108
+// CHECK-128-NEXT:    [[CASTFIXEDSVE:%.*]] = bitcast <2 x i8>* [[SAVED_VALUE]] to <vscale x 16 x i1>*
+// CHECK-128-NEXT:    [[TMP1:%.*]] = load <vscale x 16 x i1>, <vscale x 16 x i1>* [[CASTFIXEDSVE]], align 16, !tbaa [[TBAA6]]
+// CHECK-128-NEXT:    ret <vscale x 16 x i1> [[TMP1]]
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Oh, hmm, this is the case where we can't optimize.

We could probably teach instcombine to convert this pattern into a load directly from the global, if it matters.


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  https://reviews.llvm.org/D105097/new/

https://reviews.llvm.org/D105097