[PATCH] D105168: [RISCV] Unify the arch string parsing logic to to RISCVArchStringParser.

[Kito Cheng via Phabricator via cfe-commits]

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How many place you need to modify when implementing a new extension for RISC-V?

At least 6 places as I know:

- Add new SubtargetFeature at RISCV.td
- -march parser in RISCV.cpp
- RISCVTargetInfo::initFeatureMap at RISCV.cpp for handling feature vector.
- RISCVTargetInfo::getTargetDefines at RISCV.cpp for pre-define marco.
- Arch string parser for ELF attribute in RISCVAsmParser.cpp
- ELF attribute emittion in RISCVAsmParser.cpp, and make sure it's in canonical order...

And now, this patch provide an unified infrastructure for handling (almost)
everything of RISC-V arch string.

After this patch, you only need to update 2 places for implement an extension
for RISC-V:

- Add new SubtargetFeature at RISCV.td, hmmm, it's hard to avoid.
- Add new entry to SupportedExtensionInfos at RISCVArchStringParser.cpp.

Most codes are come from existing -march parser, but with few new feature/bug
fixes:

- Accept version for -march, e.g. -march=rv32i2p0.
- Reject version info with `p` but without minor version number liek `rv32i2p`.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D105168

Files:
  clang/lib/Basic/Targets/RISCV.cpp
  clang/lib/Basic/Targets/RISCV.h
  clang/lib/Driver/ToolChains/Arch/RISCV.cpp
  clang/test/Driver/riscv-arch.c
  llvm/include/llvm/Support/RISCVISAInfo.h
  llvm/lib/Support/CMakeLists.txt
  llvm/lib/Support/RISCVISAInfo.cpp
  llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  llvm/test/MC/RISCV/attribute-arch.s
  llvm/test/MC/RISCV/attribute-with-insts.s
  llvm/test/MC/RISCV/invalid-attribute.s

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