[PATCH] D100391: [RISCV][Clang] Add RVV miscellaneous intrinsic functions.
    Zakk Chen via Phabricator via cfe-commits 
    cfe-commits at lists.llvm.org
       
    Fri Apr 16 07:34:50 PDT 2021
    
    
  
khchen added inline comments.
================
Comment at: clang/include/clang/Basic/riscv_vector.td:1304
+    // Reinterpret between different SEW under the same LMUL
+    foreach dst_sew = ["(FixedLog2SEW:3)", "(FixedLog2SEW:4)", "(FixedLog2SEW:5)",
+                       "(FixedLog2SEW:6)"] in {
----------------
craig.topper wrote:
> Would this make more sense as just FixedSEW:8, FixedSEW:16, etc. I don't think the Log2 is helping here. We need it for LMUL because of the fractional lmul, but not SEW.
Agreed.
Repository:
  rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100391/new/
https://reviews.llvm.org/D100391
    
    
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