[PATCH] D99158: [RISCV][WIP] Implement intrinsics for P extension

Jim Lin via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Fri Apr 16 00:57:09 PDT 2021


Jim updated this revision to Diff 338017.
Jim added a comment.

1. Updating D99158 <https://reviews.llvm.org/D99158>: [RISCV][WIP] Implement intrinsics for P extension #
2. Enter a brief description of the changes included in this update.
3. The first line is used as subject, next lines as comment. #
4. If you intended to create a new revision, use:
5. $ arc diff --create

Only define 1 kind of intrinsic for most intructions, which
operand type and result type are the same scalar or vector type.
But s[z]unpkd* instructions have two kinds of intrinsics, extra
one has operand element width is half of result element width but
with more elements.

Refine code for IR codegen in CGBuiltin.cpp to look like B extension's implementation.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99158/new/

https://reviews.llvm.org/D99158

Files:
  clang/include/clang/AST/ASTContext.h
  clang/include/clang/Basic/Builtins.def
  clang/include/clang/Basic/BuiltinsRISCV.def
  clang/lib/AST/ASTContext.cpp
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/RISCV/rvp-intrinsics/rv32p.c
  clang/test/CodeGen/RISCV/rvp-intrinsics/rv64p.c
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoP.td
  llvm/test/CodeGen/RISCV/rvp/intrinsics-rv32p.ll
  llvm/test/CodeGen/RISCV/rvp/intrinsics-rv64p.ll



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