[PATCH] D100596: [WebAssembly] Remove saturating fp-to-int target intrinsics

Heejin Ahn via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Fri Apr 16 00:39:23 PDT 2021


aheejin accepted this revision.
aheejin added inline comments.
This revision is now accepted and ready to land.


================
Comment at: llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp:124-127
+  if (Subtarget->hasNontrappingFPToInt())
+    for (auto Op : {ISD::FP_TO_SINT_SAT, ISD::FP_TO_UINT_SAT})
+      for (auto T : {MVT::i32, MVT::i64})
+        setOperationAction(Op, T, Custom);
----------------
So far these have been expanded then?


================
Comment at: llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp:2100
+                                TargetLowering::DAGCombinerInfo &DCI) {
+  auto &DAG = DCI.DAG;
+  assert(N->getOpcode() == ISD::CONCAT_VECTORS);
----------------
So even though you used `Builder.CreateShuffleVector` in Clang, do they appear as not `VECTOR_SHUFFLE` but `CONCAT_VECTORS` by the time they reach isel?


================
Comment at: llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp:2130
+    return SDValue();
+  if (!!SplatValue)
+    return SDValue();
----------------
Nit: I think it is a little easier to read 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100596/new/

https://reviews.llvm.org/D100596



More information about the cfe-commits mailing list