[PATCH] D99190: [SYCL] Add design document for SYCL mode

Alexey Bader via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Thu Apr 1 23:30:39 PDT 2021


bader marked 2 inline comments as done.
bader added inline comments.


================
Comment at: clang/docs/SYCLSupport.md:51
+virtual calls), generates LLVM IR for the device code only and an "integration
+header" which provides information like kernel name, parameters order and data
+type for the runtime library.
----------------
Naghasan wrote:
> Do you plan on upstreaming your integration header approach ? Even if it is useful in some situations and speeds up the creation of a prototype, it comes with its complications.
> 
> An integration header creates a by-product then used as input for another compilation phase. I haven't at the upstream driver capabilities for awhile, but I don't think you can model 2 outputs yet. Are  you planing on adding this capability ?
> If not, wouldn't that forces you to trigger a compilation step just for the generation of that files ? If so that puts a strong burden on the compilation speed as you now have to process 3 times your input C++ file.
It looks like Mike addressed this issue with https://github.com/intel/llvm/pull/3471. :)


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