[PATCH] D97264: [RISCV] Define types for Zvlsseg.
Roger Ferrer Ibanez via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Wed Mar 31 23:50:02 PDT 2021
rogfer01 added a comment.
I was under the impression we didn't want to use class-member access syntax for vector tuples (see https://github.com/riscv/rvv-intrinsic-doc/issues/17#issuecomment-628998077 ) so we don't need a record type, do we?
Perhaps it is possible to model them like opaque entities similar to what we do with RVV vectors where they are expanded in `CodegenTypes.cpp`?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D97264/new/
https://reviews.llvm.org/D97264
More information about the cfe-commits
mailing list