[PATCH] D99524: [RISCV][Clang] Add some RVV Integer intrinsic functions.

Craig Topper via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Mon Mar 29 14:04:10 PDT 2021


craig.topper added inline comments.


================
Comment at: clang/include/clang/Basic/riscv_vector.td:432
+                                ["vv", "Uv", "UvUvUv"],
+                                ["vx", "Uv", "UvUvUe"]]>;
+
----------------
Should we have a common class for vadd/vsub/vand/vxor/vor. They all have the same argments except for the name.

Or maybe a common class for signed binary ops and unsigned binary ops. And some can just instantiate both classes? That would allow us to pick up min/max and shifts as well.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99524/new/

https://reviews.llvm.org/D99524



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