[PATCH] D73967: Implement _ExtInt as an extended int type specifier.

[Ronan Keryell via Phabricator via cfe-commits]

keryell added a comment.

In D73967#2653044 <https://reviews.llvm.org/D73967#2653044>, @erichkeane wrote:

> In D73967#2653042 <https://reviews.llvm.org/D73967#2653042>, @keryell wrote:
>
>> 



>> Why do you not allow a type able to represent `{-1, 0}`?
>
> Our FPGA team didn't see any value in it, so we didn't propose it to WG14, so we didn't implement it here.  I'm sure a follow-up paper to WG14 would be considered, and if it shows promise/positive reception, we'd welcome a patch here.

It comes from an FPGA tool programmer who knows about HLS *and* modern C++, so probably a very rare specie. :-)
The typical FPGA programmer and tool writer is often more focused on C, so knows barely nothing about generic programming.
In the meantime we can probably use C++20 concepts, a C++ wrapping type and some specialization for the 1bit case to handle this negative cases or just have a SYCL-specific fork...
Probably simpler to have a fork than trying to convince the C committee or FPGA people not understanding C++.


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https://reviews.llvm.org/D73967